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Searched refs:I3C_CFGR_SDMAEN (Results 1 – 17 of 17) sorted by relevance

/hal_stm32-latest/stm32cube/stm32n6xx/drivers/include/
Dstm32n6xx_ll_i3c.h1086 SET_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN); in LL_I3C_EnableDMAReq_Status()
1097 CLEAR_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN); in LL_I3C_DisableDMAReq_Status()
1108 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN) == (I3C_CFGR_SDMAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledDMAReq_Status()
/hal_stm32-latest/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_i3c.h1086 SET_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN); in LL_I3C_EnableDMAReq_Status()
1097 CLEAR_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN); in LL_I3C_DisableDMAReq_Status()
1108 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN) == (I3C_CFGR_SDMAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledDMAReq_Status()
/hal_stm32-latest/stm32cube/stm32h7rsxx/drivers/include/
Dstm32h7rsxx_ll_i3c.h1089 SET_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN); in LL_I3C_EnableDMAReq_Status()
1100 CLEAR_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN); in LL_I3C_DisableDMAReq_Status()
1111 return ((READ_BIT(I3Cx->CFGR, I3C_CFGR_SDMAEN) == (I3C_CFGR_SDMAEN)) ? 1UL : 0UL); in LL_I3C_IsEnabledDMAReq_Status()
/hal_stm32-latest/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h11854 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h523xx.h17840 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h562xx.h19384 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h533xx.h18433 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h573xx.h22109 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h563xx.h21516 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
/hal_stm32-latest/stm32cube/stm32h7rsxx/soc/
Dstm32h7r3xx.h11625 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h7s7xx.h12149 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h7s3xx.h12070 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32h7r7xx.h11702 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
/hal_stm32-latest/stm32cube/stm32n6xx/soc/
Dstm32n645xx.h20757 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32n657xx.h21699 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32n655xx.h21457 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro
Dstm32n647xx.h20999 #define I3C_CFGR_SDMAEN I3C_CFGR_SDMAEN_Msk /*!< Status FIF… macro