Searched refs:COMP1_CSR_COMP1BLANKING_Pos (Results 1 – 6 of 6) sorted by relevance
2221 #define COMP1_CSR_COMP1BLANKING_Pos (18U) macro2222 #define COMP1_CSR_COMP1BLANKING_Msk (0x3UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x000C0000 */2224 #define COMP1_CSR_COMP1BLANKING_0 (0x1UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00040000 */2225 #define COMP1_CSR_COMP1BLANKING_1 (0x2UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00080000 */2226 #define COMP1_CSR_COMP1BLANKING_2 (0x4UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00100000 */
2363 #define COMP1_CSR_COMP1BLANKING_Pos (18U) macro2364 #define COMP1_CSR_COMP1BLANKING_Msk (0x3UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x000C0000 */2366 #define COMP1_CSR_COMP1BLANKING_0 (0x1UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00040000 */2367 #define COMP1_CSR_COMP1BLANKING_1 (0x2UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00080000 */2368 #define COMP1_CSR_COMP1BLANKING_2 (0x4UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00100000 */
2405 #define COMP1_CSR_COMP1BLANKING_Pos (18U) macro2406 #define COMP1_CSR_COMP1BLANKING_Msk (0x3UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x000C0000 */2408 #define COMP1_CSR_COMP1BLANKING_0 (0x1UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00040000 */2409 #define COMP1_CSR_COMP1BLANKING_1 (0x2UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00080000 */2410 #define COMP1_CSR_COMP1BLANKING_2 (0x4UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00100000 */
2302 #define COMP1_CSR_COMP1BLANKING_Pos (18U) macro2303 #define COMP1_CSR_COMP1BLANKING_Msk (0x3UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x000C0000 */2305 #define COMP1_CSR_COMP1BLANKING_0 (0x1UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00040000 */2306 #define COMP1_CSR_COMP1BLANKING_1 (0x2UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00080000 */2307 #define COMP1_CSR_COMP1BLANKING_2 (0x4UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00100000 */
2506 #define COMP1_CSR_COMP1BLANKING_Pos (18U) macro2507 #define COMP1_CSR_COMP1BLANKING_Msk (0x3UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x000C0000 */2509 #define COMP1_CSR_COMP1BLANKING_0 (0x1UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00040000 */2510 #define COMP1_CSR_COMP1BLANKING_1 (0x2UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00080000 */2511 #define COMP1_CSR_COMP1BLANKING_2 (0x4UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00100000 */
2462 #define COMP1_CSR_COMP1BLANKING_Pos (18U) macro2463 #define COMP1_CSR_COMP1BLANKING_Msk (0x3UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x000C0000 */2465 #define COMP1_CSR_COMP1BLANKING_0 (0x1UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00040000 */2466 #define COMP1_CSR_COMP1BLANKING_1 (0x2UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00080000 */2467 #define COMP1_CSR_COMP1BLANKING_2 (0x4UL << COMP1_CSR_COMP1BLANKING_Pos) /*!< 0x00100000 */
