RCC_PLL2CFGR_PLL2REN (reference) in projects: hal_stm32-3.5.0

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Searched refs:RCC_PLL2CFGR_PLL2REN (Results 1 – 22 of 22) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/include/
D	stm32u5xx_ll_rcc.h	`4648 SET_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN); in LL_RCC_PLL2_EnableDomain_ADC() 4660 CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN); in LL_RCC_PLL2_DisableDomain_ADC() 4670 return ((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN) == (RCC_PLL2CFGR_PLL2REN)) ? 1UL : 0UL); in LL_RCC_PLL2_IsEnabledDomain_ADC()`
D	stm32u5xx_hal_rcc_ex.h	`533 #define RCC_PLL2_DIVR RCC_PLL2CFGR_PLL2REN`
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/include/
D	stm32h5xx_ll_rcc.h	`4762 SET_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN); in LL_RCC_PLL2R_Enable() 4774 CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN); in LL_RCC_PLL2R_Disable() 4804 return ((READ_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2REN) == RCC_PLL2CFGR_PLL2REN) ? 1UL : 0UL); in LL_RCC_PLL2R_IsEnabled()`
D	stm32h5xx_hal_rcc_ex.h	`542 #define RCC_PLL2_DIVR RCC_PLL2CFGR_PLL2REN`
/hal_stm32-3.5.0/stm32cube/stm32u5xx/drivers/src/
D	stm32u5xx_hal_rcc_ex.c	`3198 …CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2PEN \| RCC_PLL2CFGR_PLL2QEN \| RCC_PLL2CFGR_PLL2REN \| RCC_… in HAL_RCCEx_DisablePLL2()`
/hal_stm32-3.5.0/stm32cube/stm32h5xx/drivers/src/
D	stm32h5xx_hal_rcc_ex.c	`5383 …CLEAR_BIT(RCC->PLL2CFGR, RCC_PLL2CFGR_PLL2PEN \| RCC_PLL2CFGR_PLL2QEN \| RCC_PLL2CFGR_PLL2REN \| RCC_… in HAL_RCCEx_DisablePLL2()`
/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
D	stm32h503xx.h	`8947 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk macro`
D	stm32h562xx.h	`13288 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk macro`
D	stm32h563xx.h	`15372 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk macro`
D	stm32h573xx.h	`15917 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk macro`
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
D	stm32u545xx.h	`14559 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u535xx.h	`14046 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u575xx.h	`15417 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u5a5xx.h	`17005 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u585xx.h	`15979 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u5f7xx.h	`17976 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u595xx.h	`16443 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u599xx.h	`20169 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u5g7xx.h	`18538 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u5a9xx.h	`20731 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u5g9xx.h	`21667 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`
D	stm32u5f9xx.h	`21105 #define RCC_PLL2CFGR_PLL2REN RCC_PLL2CFGR_PLL2REN_Msk /*!< PLL2 DIVR … macro`

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