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Searched refs:DMA_MISR_MIS2_Pos (Results 1 – 20 of 20) sorted by relevance

/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/
Dstm32wba50xx.h2109 #define DMA_MISR_MIS2_Pos (2U) macro
2110 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32wba52xx.h2692 #define DMA_MISR_MIS2_Pos (2U) macro
2693 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32wba54xx.h2874 #define DMA_MISR_MIS2_Pos (2U) macro
2875 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32wba55xx.h2874 #define DMA_MISR_MIS2_Pos (2U) macro
2875 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
/hal_stm32-3.5.0/stm32cube/stm32h5xx/soc/
Dstm32h503xx.h3760 #define DMA_MISR_MIS2_Pos (2U) macro
3761 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32h562xx.h5439 #define DMA_MISR_MIS2_Pos (2U) macro
5440 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32h563xx.h7523 #define DMA_MISR_MIS2_Pos (2U) macro
7524 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32h573xx.h7958 #define DMA_MISR_MIS2_Pos (2U) macro
7959 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/
Dstm32u545xx.h6096 #define DMA_MISR_MIS2_Pos (2U) macro
6097 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u535xx.h5696 #define DMA_MISR_MIS2_Pos (2U) macro
5697 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u575xx.h6095 #define DMA_MISR_MIS2_Pos (2U) macro
6096 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u5a5xx.h6798 #define DMA_MISR_MIS2_Pos (2U) macro
6799 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u585xx.h6544 #define DMA_MISR_MIS2_Pos (2U) macro
6545 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u5f7xx.h6645 #define DMA_MISR_MIS2_Pos (2U) macro
6646 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u595xx.h6349 #define DMA_MISR_MIS2_Pos (2U) macro
6350 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u599xx.h6637 #define DMA_MISR_MIS2_Pos (2U) macro
6638 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u5g7xx.h7094 #define DMA_MISR_MIS2_Pos (2U) macro
7095 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u5a9xx.h7086 #define DMA_MISR_MIS2_Pos (2U) macro
7087 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u5g9xx.h7214 #define DMA_MISR_MIS2_Pos (2U) macro
7215 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…
Dstm32u5f9xx.h6765 #define DMA_MISR_MIS2_Pos (2U) macro
6766 #define DMA_MISR_MIS2_Msk (0x1UL << DMA_MISR_MIS2_Pos) /*!< 0x00000004…