/hal_stm32-3.5.0/stm32cube/stm32c0xx/soc/ |
D | stm32c011xx.h | 999 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1028 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32c031xx.h | 1003 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1032 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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/hal_stm32-3.5.0/stm32cube/stm32g0xx/soc/ |
D | stm32g030xx.h | 1052 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1081 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g070xx.h | 1074 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1103 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g050xx.h | 1071 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1100 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g031xx.h | 1095 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1124 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g041xx.h | 1142 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1171 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g051xx.h | 1158 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1187 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g061xx.h | 1205 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1234 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g071xx.h | 1207 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1236 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g081xx.h | 1254 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1283 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g0b0xx.h | 1156 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1185 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g0c1xx.h | 1421 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1450 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32g0b1xx.h | 1374 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1403 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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/hal_stm32-3.5.0/stm32cube/stm32wlxx/soc/ |
D | stm32wle4xx.h | 1381 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1410 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32wle5xx.h | 1381 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1410 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32wl54xx.h | 1563 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1592 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32wl55xx.h | 1563 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1592 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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D | stm32wl5mxx.h | 1563 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro 1592 #define ADC_TR2_HT2_3 ADC_AWD2TR_HT2_3
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/hal_stm32-3.5.0/stm32cube/stm32wbaxx/soc/ |
D | stm32wba50xx.h | 1472 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro
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D | stm32wba52xx.h | 1951 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro
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D | stm32wba54xx.h | 2066 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro
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D | stm32wba55xx.h | 2066 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro
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/hal_stm32-3.5.0/stm32cube/stm32u5xx/soc/ |
D | stm32u545xx.h | 4327 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro
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D | stm32u535xx.h | 4163 #define ADC_AWD2TR_HT2_3 (0x008UL << ADC_AWD2TR_HT2_Pos) /*!< 0x00080000 */ macro
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