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Searched refs:__ADC_PTR_REG_OFFSET (Results 1 – 17 of 17) sorted by relevance

/hal_stm32-3.4.0/stm32cube/stm32u5xx/drivers/include/
Dstm32u5xx_ll_adc.h544 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3623 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3697 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3723 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3752 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSign()
3776 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSign()
3802 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSignedSaturation()
3825 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSignedSaturation()
3850 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetUnsignedSaturation()
3873 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetUnsignedSaturation()
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/hal_stm32-3.4.0/stm32cube/stm32h7xx/drivers/include/
Dstm32h7xx_ll_adc.h426 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3374 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3456 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3482 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3555 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSignedSaturation()
3588 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSignedSaturation()
3620 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSaturation()
3649 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSaturation()
3684 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSign()
3713 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSign()
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/hal_stm32-3.4.0/stm32cube/stm32h5xx/drivers/include/
Dstm32h5xx_ll_adc.h414 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3628 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3699 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3725 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3758 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetState()
3784 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetState()
3813 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSign()
3839 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSign()
3868 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSaturation()
3894 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSaturation()
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/hal_stm32-3.4.0/stm32cube/stm32f1xx/drivers/include/
Dstm32f1xx_ll_adc.h228 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2137 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_SetSequencerRanks()
2227 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_GetSequencerRanks()
2723 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOF… in LL_ADC_INJ_SetOffset()
2750 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOF… in LL_ADC_INJ_GetOffset()
2843 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_SetChannelSamplingTime()
2912 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_GetChannelSamplingTime()
3136 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_SetAnalogWDThresholds()
3159 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_GetAnalogWDThresholds()
3514 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFS… in LL_ADC_INJ_ReadConversionData32()
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/hal_stm32-3.4.0/stm32cube/stm32g4xx/drivers/include/
Dstm32g4xx_ll_adc.h372 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3222 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3305 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3331 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3364 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetState()
3390 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetState()
3419 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSign()
3445 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSign()
3474 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSaturation()
3500 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSaturation()
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/hal_stm32-3.4.0/stm32cube/stm32f3xx/drivers/include/
Dstm32f3xx_ll_adc.h406 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2963 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3036 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3062 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3122 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetState()
3625 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_SetSequencerRanks()
3726 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_GetSequencerRanks()
4829 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_SetChannelSamplingTime()
4913 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_GetChannelSamplingTime()
5185 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR, __ADC_MASK_SHIFT(AWDy, ADC_AWD_CRX_REGOFFSE… in LL_ADC_SetAnalogWDMonitChannels()
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/hal_stm32-3.4.0/stm32cube/stm32l5xx/drivers/include/
Dstm32l5xx_ll_adc.h411 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3448 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3520 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3546 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3579 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetState()
3605 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetState()
4058 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, in LL_ADC_REG_SetSequencerRanks()
4158 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, in LL_ADC_REG_GetSequencerRanks()
5172 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, in LL_ADC_SetChannelSamplingTime()
5257 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFF… in LL_ADC_GetChannelSamplingTime()
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/hal_stm32-3.4.0/stm32cube/stm32mp1xx/drivers/include/
Dstm32mp1xx_ll_adc.h392 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2872 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
2944 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
2970 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3035 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetSignedSaturation()
3058 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetSignedSaturation()
3482 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> AD… in LL_ADC_REG_SetSequencerRanks()
3580 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK)… in LL_ADC_REG_GetSequencerRanks()
4527 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MA… in LL_ADC_SetChannelSamplingTime()
4608 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFF… in LL_ADC_GetChannelSamplingTime()
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/hal_stm32-3.4.0/stm32cube/stm32l4xx/drivers/include/
Dstm32l4xx_ll_adc.h376 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2931 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3010 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3036 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3069 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetState()
3095 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetState()
3556 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> AD… in LL_ADC_REG_SetSequencerRanks()
3661 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK)… in LL_ADC_REG_GetSequencerRanks()
4722 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MA… in LL_ADC_SetChannelSamplingTime()
4814 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFF… in LL_ADC_GetChannelSamplingTime()
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/hal_stm32-3.4.0/stm32cube/stm32f7xx/drivers/include/
Dstm32f7xx_ll_adc.h294 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2457 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_SetSequencerRanks()
2550 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_GetSequencerRanks()
3115 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOF… in LL_ADC_INJ_SetOffset()
3142 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOF… in LL_ADC_INJ_GetOffset()
3239 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_SetChannelSamplingTime()
3312 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_GetChannelSamplingTime()
3549 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_SetAnalogWDThresholds()
3572 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_GetAnalogWDThresholds()
4107 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFS… in LL_ADC_INJ_ReadConversionData32()
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/hal_stm32-3.4.0/stm32cube/stm32f2xx/drivers/include/
Dstm32f2xx_ll_adc.h285 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2350 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQR… in LL_ADC_REG_SetSequencerRanks()
2442 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQR… in LL_ADC_REG_GetSequencerRanks()
3009 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JO… in LL_ADC_INJ_SetOffset()
3036 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JO… in LL_ADC_INJ_GetOffset()
3132 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHA… in LL_ADC_SetChannelSamplingTime()
3204 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHA… in LL_ADC_GetChannelSamplingTime()
3440 register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_SetAnalogWDThresholds()
3463 register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_GetAnalogWDThresholds()
3998 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDR… in LL_ADC_INJ_ReadConversionData32()
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/hal_stm32-3.4.0/stm32cube/stm32f4xx/drivers/include/
Dstm32f4xx_ll_adc.h296 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2496 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_SetSequencerRanks()
2589 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFS… in LL_ADC_REG_GetSequencerRanks()
3158 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOF… in LL_ADC_INJ_SetOffset()
3185 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOF… in LL_ADC_INJ_GetOffset()
3282 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_SetChannelSamplingTime()
3355 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPR… in LL_ADC_GetChannelSamplingTime()
3592 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_SetAnalogWDThresholds()
3615 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_GetAnalogWDThresholds()
4154 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFS… in LL_ADC_INJ_ReadConversionData32()
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/hal_stm32-3.4.0/stm32cube/stm32l1xx/drivers/include/
Dstm32l1xx_ll_adc.h368 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
2982 …uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFSET_MA… in LL_ADC_REG_SetSequencerRanks()
3120 …uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, __ADC_MASK_SHIFT(Rank, ADC_REG_SQRX_REGOFFSET_MA… in LL_ADC_REG_GetSequencerRanks()
3711 …uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOFFSET_… in LL_ADC_INJ_SetOffset()
3738 …uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JOFR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JOFRX_REGOFFSET_… in LL_ADC_INJ_GetOffset()
3867 …uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPRX_REG… in LL_ADC_SetChannelSamplingTime()
3972 …uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, __ADC_MASK_SHIFT(Channel, ADC_CHANNEL_SMPRX_REG… in LL_ADC_GetChannelSamplingTime()
4380 uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_SetAnalogWDThresholds()
4403 uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->HTR, AWDThresholdsHighLow); in LL_ADC_GetAnalogWDThresholds()
4700 …uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->JDR1, __ADC_MASK_SHIFT(Rank, ADC_INJ_JDRX_REGOFFSET_MA… in LL_ADC_INJ_ReadConversionData32()
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/hal_stm32-3.4.0/stm32cube/stm32wbxx/drivers/include/
Dstm32wbxx_ll_adc.h466 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3196 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffset()
3263 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetChannel()
3289 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetLevel()
3322 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_SetOffsetState()
3348 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->OFR1, Offsety); in LL_ADC_GetOffsetState()
3977 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK) >> AD… in LL_ADC_REG_SetSequencerRanks()
4080 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SQR1, ((Rank & ADC_REG_SQRX_REGOFFSET_MASK)… in LL_ADC_REG_GetSequencerRanks()
5465 …__IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFFSET_MA… in LL_ADC_SetChannelSamplingTime()
5631 …const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->SMPR1, ((Channel & ADC_CHANNEL_SMPRX_REGOFF… in LL_ADC_GetChannelSamplingTime()
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/hal_stm32-3.4.0/stm32cube/stm32wlxx/drivers/include/
Dstm32wlxx_ll_adc.h296 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3674 preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR1, 0UL); in LL_ADC_SetAnalogWDMonitChannels()
3678 preg = __ADC_PTR_REG_OFFSET(ADCx->AWD2CR, in LL_ADC_SetAnalogWDMonitChannels()
3766 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR1, in LL_ADC_GetAnalogWDMonitChannels()
3891 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_ConfigAnalogWDThresholds()
3974 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_SetAnalogWDThresholds()
4020 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-3.4.0/stm32cube/stm32c0xx/drivers/include/
Dstm32c0xx_ll_adc.h288 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3680 preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR1, 0UL); in LL_ADC_SetAnalogWDMonitChannels()
3684 …preg = __ADC_PTR_REG_OFFSET(ADCx->AWD2CR, ((AWDy & ADC_AWD_CRX_REGOFFSET_MASK)) >> (ADC_AWD_CRX_RE… in LL_ADC_SetAnalogWDMonitChannels()
3780 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR1, ((AWDy & ADC_AWD_CRX_REGOFFSET_MA… in LL_ADC_GetAnalogWDMonitChannels()
3902 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, (((AWDy & ADC_AWD_TRX_REGOFFSET_MAS… in LL_ADC_ConfigAnalogWDThresholds()
3979 …register __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, (((AWDy & ADC_AWD_TRX_REGOFFSET_MAS… in LL_ADC_SetAnalogWDThresholds()
4021 …register const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->TR1, (((AWDy & ADC_AWD_TRX_REGOFFS… in LL_ADC_GetAnalogWDThresholds()
/hal_stm32-3.4.0/stm32cube/stm32g0xx/drivers/include/
Dstm32g0xx_ll_adc.h297 #define __ADC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \ macro
3922 preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR1, 0UL); in LL_ADC_SetAnalogWDMonitChannels()
3926 preg = __ADC_PTR_REG_OFFSET(ADCx->AWD2CR, in LL_ADC_SetAnalogWDMonitChannels()
4015 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->CFGR1, in LL_ADC_GetAnalogWDMonitChannels()
4140 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_ConfigAnalogWDThresholds()
4223 __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_SetAnalogWDThresholds()
4269 const __IO uint32_t *preg = __ADC_PTR_REG_OFFSET(ADCx->AWD1TR, in LL_ADC_GetAnalogWDThresholds()