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Searched refs:SIM_UIDL_UID31_0_MASK (Results 1 – 25 of 27) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SIM.h404 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
407 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
DS32K118_SIM.h404 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
407 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
DS32K142W_SIM.h495 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
498 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
DS32K142_SIM.h475 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
478 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
DS32K144W_SIM.h495 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
498 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
DS32K144_SIM.h475 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
478 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
DS32K146_SIM.h520 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
523 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
DS32K148_SIM.h555 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
558 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h10650 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
10654 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h10652 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
10656 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM14ZA5/
DMKM14ZA5.h10342 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
10346 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h11489 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
11493 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h13293 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13297 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h13265 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13268 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h13299 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13303 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h13296 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13300 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h13526 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13530 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h13269 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13272 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h13529 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13533 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h13267 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
13270 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h16848 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
16852 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM33ZA5/
DMKM33ZA5.h15047 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
15051 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h17854 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
17858 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h17848 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
17852 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKM34ZA5/
DMKM34ZA5.h15043 #define SIM_UIDL_UID31_0_MASK (0xFFFFFFFFU) macro
15047 … (((uint32_t)(((uint32_t)(x)) << SIM_UIDL_UID31_0_SHIFT)) & SIM_UIDL_UID31_0_MASK)

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