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Searched refs:FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA142/
DMCXA142.h7815 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
7818 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA143/
DMCXA143.h7815 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
7818 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA153/
DMCXA153.h7815 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
7818 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA152/
DMCXA152.h7815 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
7818 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h10870 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
10873 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h10870 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
10873 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h10870 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
10873 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h10874 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
10877 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h10874 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
10877 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h10874 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
10877 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h17918 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
17921 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h17888 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
17891 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/
DMCXN546_cm33_core0.h26626 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26629 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
DMCXN546_cm33_core1.h26626 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26629 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/
DMCXN547_cm33_core0.h26626 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26629 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
DMCXN547_cm33_core1.h26626 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26629 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/
DMCXN947_cm33_core1.h26672 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26675 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
DMCXN947_cm33_core0.h26672 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26675 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/
DMCXN946_cm33_core0.h26672 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26675 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)
DMCXN946_cm33_core1.h26672 #define FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK (0xFF0U) macro
26675 …t)(((uint32_t)(x)) << FMUTEST_R_IP_CONFIG_BIST_CDIVL_SHIFT)) & FMUTEST_R_IP_CONFIG_BIST_CDIVL_MASK)