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Searched refs:istrPrefetchEnable (Results 1 – 22 of 22) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1175/drivers/cm7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1176/drivers/cm7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML6/drivers/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1173/drivers/cm7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/cache/armv7-m7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1166/drivers/cm7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1165/drivers/cm7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1171/drivers/cm7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1172/drivers/cm7/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML4/drivers/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMX8ML3/drivers/
Dfsl_cache.c203 L2CACHEC_REG1_AUX_CONTROL_IPE(config->istrPrefetchEnable) | in L2CACHE_Init()
262 config->istrPrefetchEnable = false; in L2CACHE_GetDefaultConfig()
Dfsl_cache.h106 bool istrPrefetchEnable; /*!< Instruction prefetch enable. */ member