Searched refs:By (Results 1 – 25 of 427) sorted by relevance
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/Zephyr-latest/boards/st/nucleo_h503rb/ |
D | st_morpho_connector.dtsi | 19 /* By default, PA13 and PA14 are used as SWD signals 44 /* By default, connected to USB connector (SB13=ON, SB17=ON) */ 47 /* By default, connected to USB connector (SB13=ON, SB17=ON) */
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/Zephyr-latest/samples/drivers/jesd216/ |
D | README.rst | 45 ET1: instr 20h for 4096 By; typ 48 ms, max 384 ms 46 ET2: instr 52h for 32768 By; typ 240 ms, max 1920 ms 47 ET3: instr D8h for 65536 By; typ 480 ms, max 3840 ms 51 Page size: 256 By
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/Zephyr-latest/boards/st/stm32mp157c_dk2/support/ |
D | openocd.cfg | 3 # By default the port 3333 is assigned for the Cortex-A debug. Disable them
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/Zephyr-latest/boards/infineon/cy8ckit_062s2_ai/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port
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/Zephyr-latest/boards/st/nucleo_h745zi_q/ |
D | nucleo_h745zi_q_stm32h745xx_m4_defconfig | 7 # By default SERIAL peripherals are assigned to m7
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/Zephyr-latest/boards/st/nucleo_h755zi_q/ |
D | nucleo_h755zi_q_stm32h755xx_m4_defconfig | 7 # By default SERIAL peripherals are assigned to m7
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/Zephyr-latest/boards/st/stm32h747i_disco/ |
D | stm32h747i_disco_stm32h747xx_m4_defconfig | 16 # By default CONSOLE is assigned to m7
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/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/support/ |
D | openocd.cfg | 9 # By default connect over Debug USB port
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/Zephyr-latest/boards/st/stm32h745i_disco/ |
D | stm32h745i_disco_stm32h745xx_m4_defconfig | 8 # By default SERIAL peripherals are assigned to m7
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/Zephyr-latest/boards/cypress/cy8ckit_062_ble/support/ |
D | openocd.cfg | 9 # By default connect over Debug USB port
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/Zephyr-latest/boards/cypress/cy8ckit_062_wifi_bt/support/ |
D | openocd.cfg | 9 # By default connect over Debug USB port
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/Zephyr-latest/boards/infineon/cy8cproto_063_ble/support/ |
D | openocd.cfg | 10 # By default connect over Debug USB port
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4104a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4161a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4170a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4180a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4250b/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4255a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/radio_boards/xg23_rb4210a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/radio_boards/xg24_rb4187c/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/soc/nxp/lpc/lpc55xxx/ |
D | Kconfig.defconfig | 29 # By default, CMSIS SystemInit will enable the clock to these RAM banks. 35 # By default, USB RAM is assumed to be present.
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/Zephyr-latest/samples/bluetooth/bap_broadcast_source/ |
D | Kconfig | 25 # By default let's enable it in the platforms we know are capable of supporting it 34 # By default, use the USB Audio path is disabled.
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/Zephyr-latest/subsys/rtio/ |
D | Kconfig | 16 adds a small RAM overhead for a single semaphore. By default wait_for will 28 This adds a small RAM overhead for a single semaphore. By default the call
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/Zephyr-latest/boards/silabs/radio_boards/slwrb4321a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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/Zephyr-latest/boards/silabs/starter_kits/slstk3701a/support/ |
D | openocd.cfg | 4 # By default connect over Debug USB port using the J-Link interface
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