Searched refs:ctrl1 (Results 1 – 8 of 8) sorted by relevance
| /Zephyr-latest/drivers/ieee802154/ |
| D | ieee802154_mcr20a.c | 433 uint8_t ctrl1; in mcr20a_abort_sequence() local
435 ctrl1 = read_reg_phy_ctrl1(dev); in mcr20a_abort_sequence()
436 LOG_DBG("CTRL1 0x%02x", ctrl1); in mcr20a_abort_sequence()
438 if (((ctrl1 & MCR20A_PHY_CTRL1_XCVSEQ_MASK) == MCR20A_XCVSEQ_TX) || in mcr20a_abort_sequence()
439 ((ctrl1 & MCR20A_PHY_CTRL1_XCVSEQ_MASK) == MCR20A_XCVSEQ_TX_RX)) { in mcr20a_abort_sequence()
446 ctrl1 &= ~MCR20A_PHY_CTRL1_XCVSEQ_MASK; in mcr20a_abort_sequence()
447 if (!write_reg_phy_ctrl1(dev, ctrl1)) { in mcr20a_abort_sequence()
465 uint8_t ctrl1 = 0U; in mcr20a_set_sequence() local
468 ctrl1 = read_reg_phy_ctrl1(dev); in mcr20a_set_sequence()
469 ctrl1 &= ~MCR20A_PHY_CTRL1_XCVSEQ_MASK; in mcr20a_set_sequence()
[all …]
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| /Zephyr-latest/drivers/serial/ |
| D | uart_b91.c | 49 uint8_t ctrl1; member
212 uart->ctrl1 |= FLD_UART_PARITY_ENABLE; in uart_b91_init()
216 uart->ctrl1 &= (~FLD_UART_PARITY_POLARITY); in uart_b91_init()
219 uart->ctrl1 |= FLD_UART_PARITY_POLARITY; in uart_b91_init()
222 uart->ctrl1 &= (~FLD_UART_PARITY_ENABLE); /* disable parity function */ in uart_b91_init()
226 uart->ctrl1 &= (~FLD_UART_STOP_SEL); in uart_b91_init()
227 uart->ctrl1 |= stop_bit; in uart_b91_init()
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| /Zephyr-latest/drivers/usb/bc12/ |
| D | bc12_pi3usb9201.c | 129 uint8_t ctrl1; in pi3usb9201_get_mode() local
131 rv = i2c_reg_read_byte_dt(&cfg->i2c, PI3USB9201_REG_CTRL_1, &ctrl1); in pi3usb9201_get_mode()
136 ctrl1 >>= PI3USB9201_REG_CTRL_1_MODE_SHIFT; in pi3usb9201_get_mode()
137 ctrl1 &= PI3USB9201_REG_CTRL_1_MODE_MASK; in pi3usb9201_get_mode()
138 *mode = ctrl1; in pi3usb9201_get_mode()
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| /Zephyr-latest/drivers/regulator/ |
| D | regulator_da1469x.c | 91 uint32_t ctrl1; member
221 dcdc_state.ctrl1 = DCDC->DCDC_CTRL1_REG; in regulator_da1469x_enable()
251 dcdc_state.ctrl1 = DCDC->DCDC_CTRL1_REG; in regulator_da1469x_disable()
424 DCDC->DCDC_CTRL1_REG = dcdc_state.ctrl1; in regulator_da1469x_pm_action()
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| /Zephyr-latest/drivers/sensor/st/lis2dh/ |
| D | lis2dh_trigger.c | 87 uint8_t ctrl1 = 0U; in lis2dh_start_trigger_int1() local
91 status = lis2dh->hw_tf->read_reg(dev, LIS2DH_REG_CTRL1, &ctrl1); in lis2dh_start_trigger_int1()
96 ctrl1 & ~LIS2DH_ODR_MASK); in lis2dh_start_trigger_int1()
102 LOG_DBG("ctrl1=0x%x @tick=%u", ctrl1, k_cycle_get_32()); in lis2dh_start_trigger_int1()
114 status = lis2dh->hw_tf->write_reg(dev, LIS2DH_REG_CTRL1, ctrl1); in lis2dh_start_trigger_int1()
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| /Zephyr-latest/drivers/can/ |
| D | can_mcux_flexcan.c | 394 uint32_t ctrl1; in mcux_flexcan_set_mode() local
419 ctrl1 = config->base->CTRL1; in mcux_flexcan_set_mode()
424 ctrl1 |= CAN_CTRL1_LPB_MASK; in mcux_flexcan_set_mode()
428 ctrl1 &= ~(CAN_CTRL1_LPB_MASK); in mcux_flexcan_set_mode()
434 ctrl1 |= CAN_CTRL1_LOM_MASK; in mcux_flexcan_set_mode()
437 ctrl1 &= ~(CAN_CTRL1_LOM_MASK); in mcux_flexcan_set_mode()
442 ctrl1 |= CAN_CTRL1_SMP_MASK; in mcux_flexcan_set_mode()
445 ctrl1 &= ~(CAN_CTRL1_SMP_MASK); in mcux_flexcan_set_mode()
451 ctrl1 |= CAN_CTRL1_BOFFREC_MASK; in mcux_flexcan_set_mode()
454 ctrl1 &= ~(CAN_CTRL1_BOFFREC_MASK); in mcux_flexcan_set_mode()
[all …]
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| /Zephyr-latest/drivers/spi/ |
| D | spi_max32.c | 176 MXC_SETFIELD(spi->ctrl1, MXC_F_SPI_CTRL1_RX_NUM_CHAR, in spi_max32_setup()
180 spi->ctrl1 &= ~MXC_F_SPI_CTRL1_RX_NUM_CHAR; in spi_max32_setup()
185 MXC_SETFIELD(spi->ctrl1, MXC_F_SPI_CTRL1_TX_NUM_CHAR, in spi_max32_setup()
189 spi->ctrl1 &= ~MXC_F_SPI_CTRL1_TX_NUM_CHAR; in spi_max32_setup()
582 MXC_SETFIELD(spi->ctrl1, MXC_F_SPI_CTRL1_RX_NUM_CHAR, in transceive_dma()
594 MXC_SETFIELD(spi->ctrl1, MXC_F_SPI_CTRL1_TX_NUM_CHAR, in transceive_dma()
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| /Zephyr-latest/drivers/rtc/ |
| D | rtc_rv3028.c | 278 uint8_t ctrl1; in rv3028_enter_eerd() local
282 ret = rv3028_read_reg8(dev, RV3028_REG_CONTROL1, &ctrl1); in rv3028_enter_eerd()
287 eerd = ctrl1 & RV3028_CONTROL1_EERD; in rv3028_enter_eerd()
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