Lines Matching refs:ctrl1
433 uint8_t ctrl1; in mcr20a_abort_sequence() local
435 ctrl1 = read_reg_phy_ctrl1(dev); in mcr20a_abort_sequence()
436 LOG_DBG("CTRL1 0x%02x", ctrl1); in mcr20a_abort_sequence()
438 if (((ctrl1 & MCR20A_PHY_CTRL1_XCVSEQ_MASK) == MCR20A_XCVSEQ_TX) || in mcr20a_abort_sequence()
439 ((ctrl1 & MCR20A_PHY_CTRL1_XCVSEQ_MASK) == MCR20A_XCVSEQ_TX_RX)) { in mcr20a_abort_sequence()
446 ctrl1 &= ~MCR20A_PHY_CTRL1_XCVSEQ_MASK; in mcr20a_abort_sequence()
447 if (!write_reg_phy_ctrl1(dev, ctrl1)) { in mcr20a_abort_sequence()
465 uint8_t ctrl1 = 0U; in mcr20a_set_sequence() local
468 ctrl1 = read_reg_phy_ctrl1(dev); in mcr20a_set_sequence()
469 ctrl1 &= ~MCR20A_PHY_CTRL1_XCVSEQ_MASK; in mcr20a_set_sequence()
472 (ctrl1 & MCR20A_PHY_CTRL1_RXACKRQD)) { in mcr20a_set_sequence()
478 ctrl1 |= seq; in mcr20a_set_sequence()
479 if (!write_reg_phy_ctrl1(dev, ctrl1)) { in mcr20a_set_sequence()
739 uint8_t ctrl1 = 0U; in mcr20a_thread_main() local
758 ctrl1 = dregs[MCR20A_PHY_CTRL1]; in mcr20a_thread_main()
779 ctrl1 &= ~MCR20A_PHY_CTRL1_XCVSEQ_MASK; in mcr20a_thread_main()
780 if (!write_reg_phy_ctrl1(dev, ctrl1)) { in mcr20a_thread_main()
914 uint8_t ctrl1; in mcr20a_set_channel() local
929 ctrl1 = read_reg_phy_ctrl1(dev); in mcr20a_set_channel()
947 if (mcr20a_set_sequence(dev, ctrl1)) { in mcr20a_set_channel()