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Searched refs:vaddr_start (Results 1 – 18 of 18) sorted by relevance

/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dcache_ll.h62 static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t vaddr_start, uint32_… in cache_ll_l1_get_bus() argument
67 uint32_t vaddr_end = vaddr_start + len - 1; in cache_ll_l1_get_bus()
68 if (vaddr_start >= IRAM1_ADDRESS_LOW) { in cache_ll_l1_get_bus()
70 } else if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
73 } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
77 } else if (vaddr_start >= DRAM1_ADDRESS_LOW) { in cache_ll_l1_get_bus()
82 } else if (vaddr_start >= DPORT_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
88 } else if (vaddr_start >= DROM0_ADDRESS_LOW) { in cache_ll_l1_get_bus()
Dmmu_ll.h94 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint3… in mmu_ll_check_valid_ext_vaddr_region() argument
97 uint32_t vaddr_end = vaddr_start + len - 1; in mmu_ll_check_valid_ext_vaddr_region()
101 …valid |= ((vaddr_start >= DROM0_ADDRESS_LOW) && (vaddr_end < DROM0_ADDRESS_HIGH)) || ((vaddr_start in mmu_ll_check_valid_ext_vaddr_region()
105 valid |= ((vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) && (vaddr_end < IRAM1_ADDRESS_HIGH)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dcache_ll.h95 static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t vaddr_start, uint32_… in cache_ll_l1_get_bus() argument
100 uint32_t vaddr_end = vaddr_start + len - 1; in cache_ll_l1_get_bus()
101 if (vaddr_start >= IROM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
103 } else if (vaddr_start >= IROM0_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
105 } else if (vaddr_start >= IRAM1_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
108 } else if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
112 } else if (vaddr_start >= DRAM1_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
115 } else if (vaddr_start >= DROM0_CACHE_ADDRESS_LOW) { in cache_ll_l1_get_bus()
Dmmu_ll.h96 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint3… in mmu_ll_check_valid_ext_vaddr_region() argument
99 uint32_t vaddr_end = vaddr_start + len - 1; in mmu_ll_check_valid_ext_vaddr_region()
103 valid |= (ADDRESS_IN_DRAM1_CACHE(vaddr_start) && ADDRESS_IN_DRAM1_CACHE(vaddr_end)) || in mmu_ll_check_valid_ext_vaddr_region()
104 (ADDRESS_IN_DROM0_CACHE(vaddr_start) && ADDRESS_IN_DROM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
108 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || in mmu_ll_check_valid_ext_vaddr_region()
109 (ADDRESS_IN_IRAM1_CACHE(vaddr_start) && ADDRESS_IN_IRAM1_CACHE(vaddr_end)) || in mmu_ll_check_valid_ext_vaddr_region()
110 (ADDRESS_IN_IROM0_CACHE(vaddr_start) && ADDRESS_IN_IROM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/esp_psram/
Desp_psram.c67 intptr_t vaddr_start; member
222 s_psram_ctx.mapped_regions[PSRAM_MEM_8BIT_ALIGNED].vaddr_start = (intptr_t)v_start_8bit_aligned; in esp_psram_init()
225 … s_psram_ctx.regions_to_heap[PSRAM_MEM_8BIT_ALIGNED].vaddr_start = (intptr_t)v_start_8bit_aligned; in esp_psram_init()
257 … s_psram_ctx.mapped_regions[PSRAM_MEM_32BIT_ALIGNED].vaddr_start = (intptr_t)v_start_32bit_aligned; in esp_psram_init()
260 …s_psram_ctx.regions_to_heap[PSRAM_MEM_32BIT_ALIGNED].vaddr_start = (intptr_t)v_start_32bit_aligned; in esp_psram_init()
280 s_psram_ctx.regions_to_heap[PSRAM_MEM_8BIT_ALIGNED].vaddr_start += ext_bss_size; in esp_psram_init()
287 s_psram_ctx.regions_to_heap[PSRAM_MEM_8BIT_ALIGNED].vaddr_start += ext_noinit_size; in esp_psram_init()
314 … s_psram_ctx.regions_to_heap[PSRAM_MEM_8BIT_ALIGNED].vaddr_start, in esp_psram_extram_add_to_heap_allocator()
321 assert(s_psram_ctx.regions_to_heap[PSRAM_MEM_32BIT_ALIGNED].vaddr_start); in esp_psram_extram_add_to_heap_allocator()
324 … s_psram_ctx.regions_to_heap[PSRAM_MEM_32BIT_ALIGNED].vaddr_start, in esp_psram_extram_add_to_heap_allocator()
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/hal_espressif-latest/components/esp_mm/
Desp_mmu_map.c73 intptr_t vaddr_start; //virtual address start of this block member
367 static void IRAM_ATTR NOINLINE_ATTR s_do_cache_invalidate(uint32_t vaddr_start, uint32_t size) in s_do_cache_invalidate() argument
377 cache_hal_invalidate_addr(vaddr_start, size); in s_do_cache_invalidate()
381 static void IRAM_ATTR NOINLINE_ATTR s_do_mapping(mmu_target_t target, uint32_t vaddr_start, esp_pad… in s_do_mapping() argument
391 mmu_hal_map_region(0, target, vaddr_start, paddr_start, size, &actual_mapped_len); in s_do_mapping()
394 mmu_hal_map_region(1, target, vaddr_start, paddr_start, size, &actual_mapped_len); in s_do_mapping()
398 cache_bus_mask_t bus_mask = cache_ll_l1_get_bus(0, vaddr_start, size); in s_do_mapping()
401 bus_mask = cache_ll_l1_get_bus(0, vaddr_start, size); in s_do_mapping()
405 s_do_cache_invalidate(vaddr_start, size); in s_do_mapping()
482 …ck is mapped already, vaddr_start: %p, size: 0x%x", (void *)mem_block->vaddr_start, mem_block->siz… in esp_mmu_map()
[all …]
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dcache_ll.h66 static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t vaddr_start, uint32_… in cache_ll_l1_get_bus() argument
71 uint32_t vaddr_end = vaddr_start + len - 1; in cache_ll_l1_get_bus()
72 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
74 } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
Dmmu_ll.h93 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint3… in mmu_ll_check_valid_ext_vaddr_region() argument
96 uint32_t vaddr_end = vaddr_start + len - 1; in mmu_ll_check_valid_ext_vaddr_region()
100 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
104 valid |= (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dcache_ll.h67 static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t vaddr_start, uint32_… in cache_ll_l1_get_bus() argument
72 uint32_t vaddr_end = vaddr_start + len - 1; in cache_ll_l1_get_bus()
73 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
75 } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
Dmmu_ll.h94 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint3… in mmu_ll_check_valid_ext_vaddr_region() argument
97 uint32_t vaddr_end = vaddr_start + len - 1; in mmu_ll_check_valid_ext_vaddr_region()
101 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
105 valid |= (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dcache_ll.h41 static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t vaddr_start, uint32_… in cache_ll_l1_get_bus() argument
46 uint32_t vaddr_end = vaddr_start + len - 1; in cache_ll_l1_get_bus()
47 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
Dmmu_ll.h104 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint3… in mmu_ll_check_valid_ext_vaddr_region() argument
108 uint32_t vaddr_end = vaddr_start + len - 1; in mmu_ll_check_valid_ext_vaddr_region()
109 …return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_D… in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dcache_ll.h41 static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t vaddr_start, uint32_… in cache_ll_l1_get_bus() argument
46 uint32_t vaddr_end = vaddr_start + len - 1; in cache_ll_l1_get_bus()
47 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
Dmmu_ll.h101 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint3… in mmu_ll_check_valid_ext_vaddr_region() argument
105 uint32_t vaddr_end = vaddr_start + len - 1; in mmu_ll_check_valid_ext_vaddr_region()
106 …return (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || (ADDRESS_IN_D… in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dcache_ll.h78 static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t vaddr_start, uint32_… in cache_ll_l1_get_bus() argument
83 uint32_t vaddr_end = vaddr_start + len - 1; in cache_ll_l1_get_bus()
84 if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW && vaddr_end < IRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
86 } else if (vaddr_start >= DRAM0_CACHE_ADDRESS_LOW && vaddr_end < DRAM0_CACHE_ADDRESS_HIGH) { in cache_ll_l1_get_bus()
Dmmu_ll.h94 static inline bool mmu_ll_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint3… in mmu_ll_check_valid_ext_vaddr_region() argument
97 uint32_t vaddr_end = vaddr_start + len - 1; in mmu_ll_check_valid_ext_vaddr_region()
101 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
105 valid |= (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/
Dmmu_hal.c154 bool mmu_hal_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len, mmu_… in mmu_hal_check_valid_ext_vaddr_region() argument
156 return mmu_ll_check_valid_ext_vaddr_region(mmu_id, vaddr_start, len, type); in mmu_hal_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/include/hal/
Dmmu_hal.h119 bool mmu_hal_check_valid_ext_vaddr_region(uint32_t mmu_id, uint32_t vaddr_start, uint32_t len, mmu_…