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Searched refs:pll_wait (Results 1 – 10 of 10) sorted by relevance

/hal_espressif-latest/components/soc/esp32/include/soc/
Drtc.h650 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
665 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Drtc.h664 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
683 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Drtc.h732 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
751 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Drtc.h761 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
780 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Drtc.h774 uint32_t pll_wait : 8; //!< Number of rtc_fast_clk cycles to wait for PLL to be ready member
793 .pll_wait = RTC_CNTL_PLL_BUF_WAIT_DEFAULT, \
/hal_espressif-latest/components/esp_hw_support/port/esp32/
Drtc_init.c36 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32s2/
Drtc_init.c43 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32c2/
Drtc_init.c37 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32c3/
Drtc_init.c49 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()
/hal_espressif-latest/components/esp_hw_support/port/esp32s3/
Drtc_init.c62 REG_SET_FIELD(RTC_CNTL_TIMER1_REG, RTC_CNTL_PLL_BUF_WAIT, cfg.pll_wait); in rtc_init()