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Searched refs:TIMG_T0UPDATE_REG (Results 1 – 8 of 8) sorted by relevance

/hal_espressif-latest/components/esp_hw_support/
Dsleep_system_peripheral.c114 …[4] = { .config = REGDMA_LINK_WRITE_INIT (REGDMA_TIMG_LINK(0x04), TIMG_T0UPDATE_REG(0), TIM… in sleep_sys_periph_tg0_retention_init()
115 …[5] = { .config = REGDMA_LINK_WAIT_INIT (REGDMA_TIMG_LINK(0x05), TIMG_T0UPDATE_REG(0), 0x0… in sleep_sys_periph_tg0_retention_init()
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Dtimer_group_reg.h124 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc) macro
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Dtimer_group_reg.h121 #define TIMG_T0UPDATE_REG(i) (DR_REG_TIMG_BASE(i) + 0xc) macro
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Dtimer_group_reg.h121 #define TIMG_T0UPDATE_REG(i) (DR_REG_TIMG_BASE(i) + 0xc) macro
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Dtimer_group_reg.h124 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc) macro
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Dtimer_group_reg.h102 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc) macro
/hal_espressif-latest/components/soc/esp32/include/soc/
Dtimer_group_reg.h96 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0x000c) macro
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Dtimer_group_reg.h132 #define TIMG_T0UPDATE_REG(i) (DR_REG_TIMG_BASE(i) + 0xc) macro