Searched refs:PSRAM_CLK_MODE_DCLK (Results 1 – 1 of 1) sorted by relevance
60 PSRAM_CLK_MODE_DCLK = 1, /*!< Two extra clock cycles after CS is set high level */ enumerator202 static psram_clk_mode_t s_clk_mode = PSRAM_CLK_MODE_DCLK;410 if (s_clk_mode == PSRAM_CLK_MODE_DCLK) { in psram_disable_qio_mode()446 if (s_clk_mode == PSRAM_CLK_MODE_DCLK) { in psram_read_id()481 if (s_clk_mode == PSRAM_CLK_MODE_DCLK) { in psram_enable_qio_mode()928 if (s_clk_mode == PSRAM_CLK_MODE_DCLK) { in esp_psram_impl_enable()977 s_clk_mode = PSRAM_CLK_MODE_DCLK; in esp_psram_impl_enable()1094 if (s_clk_mode == PSRAM_CLK_MODE_DCLK) { in psram_cache_init()
