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Searched refs:DPORT_REG_READ (Results 1 – 16 of 16) sorted by relevance

/hal_espressif-latest/components/bootloader_support/src/esp32/
Dbootloader_esp32.c98 stat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_STATUS_REG); in wdt_reset_info_dump()
99 pid = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PID_REG); in wdt_reset_info_dump()
100 inst = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGINST_REG); in wdt_reset_info_dump()
101 dstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG); in wdt_reset_info_dump()
102 data = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG); in wdt_reset_info_dump()
103 pc = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGPC_REG); in wdt_reset_info_dump()
104 lsstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG); in wdt_reset_info_dump()
105 lsaddr = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG); in wdt_reset_info_dump()
106 lsdata = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG); in wdt_reset_info_dump()
109 stat = DPORT_REG_READ(DPORT_APP_CPU_RECORD_STATUS_REG); in wdt_reset_info_dump()
[all …]
/hal_espressif-latest/zephyr/esp32/src/
Dsoc_init.c25 stat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_STATUS_REG); in wdt_reset_info_dump()
26 pid = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PID_REG); in wdt_reset_info_dump()
27 inst = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGINST_REG); in wdt_reset_info_dump()
28 dstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGSTATUS_REG); in wdt_reset_info_dump()
29 data = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGDATA_REG); in wdt_reset_info_dump()
30 pc = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGPC_REG); in wdt_reset_info_dump()
31 lsstat = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0STAT_REG); in wdt_reset_info_dump()
32 lsaddr = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0ADDR_REG); in wdt_reset_info_dump()
33 lsdata = DPORT_REG_READ(DPORT_PRO_CPU_RECORD_PDEBUGLS0DATA_REG); in wdt_reset_info_dump()
/hal_espressif-latest/components/soc/esp32/include/soc/
Ddport_access.h113 #define DPORT_REG_READ(reg) _DPORT_REG_READ(reg) macro
116 #define DPORT_REG_READ(reg) esp_dport_access_reg_read(reg) macro
134 #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
137 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
140 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
143 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
146 #define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
149 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
175 #define DPORT_READ_PERI_REG(reg) DPORT_REG_READ(reg)
/hal_espressif-latest/components/soc/esp32c6/include/soc/
Ddport_access.h39 #define DPORT_REG_READ(_r) _DPORT_REG_READ(_r) macro
43 #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
46 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
52 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
55 #define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
58 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32s3/include/soc/
Ddport_access.h36 #define DPORT_REG_READ(_r) _DPORT_REG_READ(_r) macro
40 #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
43 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
46 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
49 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
52 #define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
55 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32h2/include/soc/
Ddport_access.h38 #define DPORT_REG_READ(_r) _DPORT_REG_READ(_r) macro
42 #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
45 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
48 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
51 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
54 #define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
57 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32c3/include/soc/
Ddport_access.h39 #define DPORT_REG_READ(_r) _DPORT_REG_READ(_r) macro
43 #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
46 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
52 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
55 #define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
58 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32c2/include/soc/
Ddport_access.h39 #define DPORT_REG_READ(_r) _DPORT_REG_READ(_r) macro
43 #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
46 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
49 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
52 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
55 #define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
58 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/soc/esp32s2/include/soc/
Ddport_access.h37 #define DPORT_REG_READ(_r) _DPORT_REG_READ(_r) macro
41 #define DPORT_REG_GET_BIT(_r, _b) (DPORT_REG_READ(_r) & (_b))
44 #define DPORT_REG_SET_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r)|(_b)))
47 #define DPORT_REG_CLR_BIT(_r, _b) DPORT_REG_WRITE((_r), (DPORT_REG_READ(_r) & (~(_b))))
50 #define DPORT_REG_SET_BITS(_r, _b, _m) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~(_m))) | ((_b…
53 #define DPORT_REG_GET_FIELD(_r, _f) ((DPORT_REG_READ(_r) >> (_f##_S)) & (_f##_V))
56 #define DPORT_REG_SET_FIELD(_r, _f, _v) DPORT_REG_WRITE((_r), ((DPORT_REG_READ(_r) & (~((_f##_V) <<…
/hal_espressif-latest/components/hal/esp32/include/hal/
Dsha_ll.h102 return (DPORT_REG_READ(SHA_1_BUSY_REG) || DPORT_REG_READ(SHA_256_BUSY_REG) in sha_ll_busy()
103 || DPORT_REG_READ(SHA_384_BUSY_REG) || DPORT_REG_READ(SHA_512_BUSY_REG)); in sha_ll_busy()
Dcache_ll.h175 uint32_t bus_mask= DPORT_REG_READ(DPORT_PRO_CACHE_CTRL1_REG); in cache_ll_l1_get_enabled_bus()
183 uint32_t bus_mask= DPORT_REG_READ(DPORT_APP_CACHE_CTRL1_REG); in cache_ll_l1_get_enabled_bus()
Daes_ll.h136 return DPORT_REG_READ(AES_IDLE_REG); in aes_ll_get_state()
/hal_espressif-latest/components/mbedtls/port/esp32s2/
Dbignum.c34 while (DPORT_REG_READ(RSA_QUERY_CLEAN_REG) != 1) { in esp_mpi_enable_hardware_hw_op()
118 while (DPORT_REG_READ(RSA_QUERY_INTERRUPT_REG) != 1) in wait_op_complete()
/hal_espressif-latest/components/mbedtls/port/esp32s3/
Dbignum.c35 while (DPORT_REG_READ(RSA_QUERY_CLEAN_REG) != 1) { in esp_mpi_enable_hardware_hw_op()
120 while (DPORT_REG_READ(RSA_QUERY_INTERRUPT_REG) != 1) in wait_op_complete()
/hal_espressif-latest/components/mbedtls/port/esp32/
Dbignum.c38 while (DPORT_REG_READ(RSA_CLEAN_REG) != 1) in esp_mpi_enable_hardware_hw_op()
146 while (DPORT_REG_READ(RSA_INTERRUPT_REG) != 1) in wait_op_complete()
/hal_espressif-latest/components/bt/controller/esp32/
Dhli_api.c88 val = DPORT_REG_READ(reg); in hli_c_handler()