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Searched refs:SPI_ADDR_REG (Results 1 – 12 of 12) sorted by relevance

/hal_espressif-3.7.0/components/esp_rom/include/esp32/rom/
Dspi_flash.h51 #define PERIPHS_SPI_FLASH_ADDR SPI_ADDR_REG(1)
/hal_espressif-3.7.0/tools/esptool_py/flasher_stub/
Dstub_write_flash.c301 WRITE_REG(SPI_ADDR_REG, addr & 0xffffff); in start_next_erase()
308 WRITE_REG(SPI_ADDR_REG, addr & 0xffffff); in start_next_erase()
/hal_espressif-3.7.0/tools/esptool_py/flasher_stub/include/
Dsoc_support.h256 #define SPI_ADDR_REG (SPI_BASE_REG + 0x04) macro
/hal_espressif-3.7.0/components/esp_psram/esp32/
Desp_psram_impl_quad.c352 WRITE_PERI_REG(SPI_ADDR_REG(spi_num), *pInData->addr); in psram_cmd_config()
986 WRITE_PERI_REG(SPI_ADDR_REG(PSRAM_SPI_NUM), 32 << 24); in esp_psram_impl_enable()
/hal_espressif-3.7.0/tools/esptool_py/esptool/
Dloader.py1300 SPI_ADDR_REG = base + 0x04
1378 self.write_reg(SPI_ADDR_REG, addr)
/hal_espressif-3.7.0/components/soc/esp32c3/include/soc/
Dspi_reg.h46 #define SPI_ADDR_REG(i) (REG_SPI_BASE(i) + 0x4) macro
/hal_espressif-3.7.0/components/soc/esp32c2/include/soc/
Dspi_reg.h39 #define SPI_ADDR_REG(i) (REG_SPI_BASE(i) + 0x4) macro
/hal_espressif-3.7.0/components/soc/esp32s3/include/soc/
Dspi_reg.h46 #define SPI_ADDR_REG(i) (REG_SPI_BASE(i) + 0x4) macro
/hal_espressif-3.7.0/components/soc/esp32/include/soc/
Dspi_reg.h135 #define SPI_ADDR_REG(i) (REG_SPI_BASE(i) + 0x4) macro
/hal_espressif-3.7.0/components/soc/esp32h2/include/soc/
Dspi_reg.h46 #define SPI_ADDR_REG (DR_REG_SPI_BASE + 0x4) macro
/hal_espressif-3.7.0/components/soc/esp32c6/include/soc/
Dspi_reg.h46 #define SPI_ADDR_REG(i) (REG_SPI_BASE(i) + 0x4) macro
/hal_espressif-3.7.0/components/soc/esp32s2/include/soc/
Dspi_reg.h39 #define SPI_ADDR_REG(i) (REG_SPI_BASE(i) + 0x004) macro