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Searched refs:EFUSE_RD_RS_ERR0_REG (Results 1 – 20 of 20) sorted by relevance

/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c6/
Dmem_definition.py23 EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0 variable in EfuseDefineRegisters
45 (EFUSE_RD_RS_ERR0_REG, 7), # MAC_SPI_8M_0
46 (EFUSE_RD_RS_ERR0_REG, 11), # BLOCK_SYS_DATA
47 (EFUSE_RD_RS_ERR0_REG, 15), # BLOCK_USR_DATA
48 (EFUSE_RD_RS_ERR0_REG, 19), # BLOCK_KEY0
49 (EFUSE_RD_RS_ERR0_REG, 23), # BLOCK_KEY1
50 (EFUSE_RD_RS_ERR0_REG, 27), # BLOCK_KEY2
51 (EFUSE_RD_RS_ERR0_REG, 31), # BLOCK_KEY3
60 (EFUSE_RD_RS_ERR0_REG, 0x7, 0), # MAC_SPI_8M_0
61 (EFUSE_RD_RS_ERR0_REG, 0x7, 4), # BLOCK_SYS_DATA
[all …]
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32h2/
Dmem_definition.py23 EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0 variable in EfuseDefineRegisters
45 (EFUSE_RD_RS_ERR0_REG, 7), # MAC_SPI_8M_0
46 (EFUSE_RD_RS_ERR0_REG, 11), # BLOCK_SYS_DATA
47 (EFUSE_RD_RS_ERR0_REG, 15), # BLOCK_USR_DATA
48 (EFUSE_RD_RS_ERR0_REG, 19), # BLOCK_KEY0
49 (EFUSE_RD_RS_ERR0_REG, 23), # BLOCK_KEY1
50 (EFUSE_RD_RS_ERR0_REG, 27), # BLOCK_KEY2
51 (EFUSE_RD_RS_ERR0_REG, 31), # BLOCK_KEY3
60 (EFUSE_RD_RS_ERR0_REG, 0x7, 0), # MAC_SPI_8M_0
61 (EFUSE_RD_RS_ERR0_REG, 0x7, 4), # BLOCK_SYS_DATA
[all …]
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32c3/
Dmem_definition.py23 EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0 variable in EfuseDefineRegisters
45 (EFUSE_RD_RS_ERR0_REG, 7), # MAC_SPI_8M_0
46 (EFUSE_RD_RS_ERR0_REG, 11), # BLOCK_SYS_DATA
47 (EFUSE_RD_RS_ERR0_REG, 15), # BLOCK_USR_DATA
48 (EFUSE_RD_RS_ERR0_REG, 19), # BLOCK_KEY0
49 (EFUSE_RD_RS_ERR0_REG, 23), # BLOCK_KEY1
50 (EFUSE_RD_RS_ERR0_REG, 27), # BLOCK_KEY2
51 (EFUSE_RD_RS_ERR0_REG, 31), # BLOCK_KEY3
60 (EFUSE_RD_RS_ERR0_REG, 0x7, 0), # MAC_SPI_8M_0
61 (EFUSE_RD_RS_ERR0_REG, 0x7, 4), # BLOCK_SYS_DATA
[all …]
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32h2beta1/
Dmem_definition.py23 EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0 variable in EfuseDefineRegisters
44 (EFUSE_RD_RS_ERR0_REG, 0x7, 0, 3), # MAC_SPI_8M_0
45 (EFUSE_RD_RS_ERR0_REG, 0x7, 4, 7), # BLOCK_SYS_DATA
46 (EFUSE_RD_RS_ERR0_REG, 0x7, 8, 11), # BLOCK_USR_DATA
47 (EFUSE_RD_RS_ERR0_REG, 0x7, 12, 15), # BLOCK_KEY0
48 (EFUSE_RD_RS_ERR0_REG, 0x7, 16, 19), # BLOCK_KEY1
49 (EFUSE_RD_RS_ERR0_REG, 0x7, 20, 23), # BLOCK_KEY2
50 (EFUSE_RD_RS_ERR0_REG, 0x7, 24, 27), # BLOCK_KEY3
51 (EFUSE_RD_RS_ERR0_REG, 0x7, 28, 31), # BLOCK_KEY4
Dfields.py146 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s3/
Dmem_definition.py24 EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0 variable in EfuseDefineRegisters
45 (EFUSE_RD_RS_ERR0_REG, 0x7, 0, 3), # MAC_SPI_8M_0
46 (EFUSE_RD_RS_ERR0_REG, 0x7, 4, 7), # BLOCK_SYS_DATA
47 (EFUSE_RD_RS_ERR0_REG, 0x7, 8, 11), # BLOCK_USR_DATA
48 (EFUSE_RD_RS_ERR0_REG, 0x7, 12, 15), # BLOCK_KEY0
49 (EFUSE_RD_RS_ERR0_REG, 0x7, 16, 19), # BLOCK_KEY1
50 (EFUSE_RD_RS_ERR0_REG, 0x7, 20, 23), # BLOCK_KEY2
51 (EFUSE_RD_RS_ERR0_REG, 0x7, 24, 27), # BLOCK_KEY3
52 (EFUSE_RD_RS_ERR0_REG, 0x7, 28, 31), # BLOCK_KEY4
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s3beta2/
Dmem_definition.py24 EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x1C0 variable in EfuseDefineRegisters
45 (EFUSE_RD_RS_ERR0_REG, 0x7, 0, 3), # MAC_SPI_8M_0
46 (EFUSE_RD_RS_ERR0_REG, 0x7, 4, 7), # BLOCK_SYS_DATA
47 (EFUSE_RD_RS_ERR0_REG, 0x7, 8, 11), # BLOCK_USR_DATA
48 (EFUSE_RD_RS_ERR0_REG, 0x7, 12, 15), # BLOCK_KEY0
49 (EFUSE_RD_RS_ERR0_REG, 0x7, 16, 19), # BLOCK_KEY1
50 (EFUSE_RD_RS_ERR0_REG, 0x7, 20, 23), # BLOCK_KEY2
51 (EFUSE_RD_RS_ERR0_REG, 0x7, 24, 27), # BLOCK_KEY3
52 (EFUSE_RD_RS_ERR0_REG, 0x7, 28, 31), # BLOCK_KEY4
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
/hal_espressif-3.6.0/components/esptool_py/esptool/espefuse/efuse/esp32s2/
Dmem_definition.py23 EFUSE_RD_RS_ERR0_REG = DR_REG_EFUSE_BASE + 0x194 variable in EfuseDefineRegisters
44 (EFUSE_RD_RS_ERR0_REG, 0x7, 0, 3), # MAC_SPI_8M_0
45 (EFUSE_RD_RS_ERR0_REG, 0x7, 4, 7), # BLOCK_SYS_DATA
46 (EFUSE_RD_RS_ERR0_REG, 0x7, 8, 11), # BLOCK_USR_DATA
47 (EFUSE_RD_RS_ERR0_REG, 0x7, 12, 15), # BLOCK_KEY0
48 (EFUSE_RD_RS_ERR0_REG, 0x7, 16, 19), # BLOCK_KEY1
49 (EFUSE_RD_RS_ERR0_REG, 0x7, 20, 23), # BLOCK_KEY2
50 (EFUSE_RD_RS_ERR0_REG, 0x7, 24, 27), # BLOCK_KEY3
51 (EFUSE_RD_RS_ERR0_REG, 0x7, 28, 31), # BLOCK_KEY4
Dfields.py152 "EFUSE_RD_RS_ERR0_REG", self.read_reg(self.REGS.EFUSE_RD_RS_ERR0_REG)
/hal_espressif-3.6.0/components/esptool_py/esptool/docs/en/espefuse/
Dcheck-error-cmd.rst23 EFUSE_RD_RS_ERR0_REG 0x00000000
41 EFUSE_RD_RS_ERR0_REG 0x00008990
50 EFUSE_RD_RS_ERR0_REG 0x00008990
66 EFUSE_RD_RS_ERR0_REG 0x00008990
75 EFUSE_RD_RS_ERR0_REG 0x00008990
98 EFUSE_RD_RS_ERR0_REG 0x00008890
Ddump-cmd.rst80 EFUSE_RD_RS_ERR0_REG 0x00000000
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Defuse_reg.h1575 #define EFUSE_RD_RS_ERR0_REG (DR_REG_EFUSE_BASE + 0x1C0) macro
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Defuse_reg.h1702 #define EFUSE_RD_RS_ERR0_REG (DR_REG_EFUSE_BASE + 0x1C0) macro
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Defuse_reg.h1639 #define EFUSE_RD_RS_ERR0_REG (DR_REG_EFUSE_BASE + 0x1C0) macro
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Defuse_reg.h1925 #define EFUSE_RD_RS_ERR0_REG (DR_REG_EFUSE_BASE + 0x1c0) macro