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Searched refs:APB_CLK_FREQ (Results 1 – 25 of 30) sorted by relevance

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/hal_espressif-3.6.0/components/driver/include/driver/
Dspi_master.h17 #define SPI_MASTER_FREQ_8M (APB_CLK_FREQ/10)
18 #define SPI_MASTER_FREQ_9M (APB_CLK_FREQ/9) ///< 8.89MHz
19 #define SPI_MASTER_FREQ_10M (APB_CLK_FREQ/8) ///< 10MHz
20 #define SPI_MASTER_FREQ_11M (APB_CLK_FREQ/7) ///< 11.43MHz
21 #define SPI_MASTER_FREQ_13M (APB_CLK_FREQ/6) ///< 13.33MHz
22 #define SPI_MASTER_FREQ_16M (APB_CLK_FREQ/5) ///< 16MHz
23 #define SPI_MASTER_FREQ_20M (APB_CLK_FREQ/4) ///< 20MHz
24 #define SPI_MASTER_FREQ_26M (APB_CLK_FREQ/3) ///< 26.67MHz
25 #define SPI_MASTER_FREQ_40M (APB_CLK_FREQ/2) ///< 40MHz
26 #define SPI_MASTER_FREQ_80M (APB_CLK_FREQ/1) ///< 80MHz
Dledc.h20 #define LEDC_APB_CLK_HZ (APB_CLK_FREQ)
Dtimer.h20 #define TIMER_BASE_CLK (APB_CLK_FREQ) /*!< Frequency of the clock on the input of the timer grou…
Di2c.h26 #define I2C_APB_CLK_FREQ APB_CLK_FREQ /*!< I2C source clock is APB clock, 80MHz */
/hal_espressif-3.6.0/components/hal/
Dspi_flash_hal.c24 #define APB_CYCLE_NS (1000*1000*1000LL/APB_CLK_FREQ)
60 const int apbclk_kHz = APB_CLK_FREQ / 1000; in get_dummy_n()
62 const int apbclk_n = APB_CLK_FREQ / eff_clk; in get_dummy_n()
121 …data_out->extra_dummy = get_dummy_n(!cfg->iomux, cfg->input_delay_ns, APB_CLK_FREQ/clock_cfg->div); in spi_flash_hal_init()
Dspi_hal.c121 const int apbclk_kHz = APB_CLK_FREQ / 1000; in spi_hal_cal_timing()
123 const int spiclk_apb_n = APB_CLK_FREQ / eff_clk; in spi_hal_cal_timing()
152 const int apbclk_kHz = APB_CLK_FREQ / 1000; in spi_hal_get_freq_limit()
161 return APB_CLK_FREQ / (delay_apb_n + 1); in spi_hal_get_freq_limit()
Dadc_hal.c101 #define I2S_BASE_CLK (2*APB_CLK_FREQ)
229 …uint32_t interval = APB_CLK_FREQ / (ADC_LL_CLKM_DIV_NUM_DEFAULT + ADC_LL_CLKM_DIV_A_DEFAULT / ADC_… in adc_hal_digi_sample_freq_config()
456 …uint32_t digi_clk = APB_CLK_FREQ / (ADC_LL_CLKM_DIV_NUM_DEFAULT + ADC_LL_CLKM_DIV_A_DEFAULT / ADC_… in adc_hal_onetime_start()
462 if (digi_clk >= APB_CLK_FREQ/8) { in adc_hal_onetime_start()
/hal_espressif-3.6.0/components/soc/esp32c3/include/soc/
Dsoc.h203 #define CPU_CLK_FREQ APB_CLK_FREQ
205 #define APB_CLK_FREQ ( 40*1000000 ) macro
207 #define APB_CLK_FREQ ( 80*1000000 ) macro
212 #define UART_CLK_FREQ APB_CLK_FREQ
213 #define WDT_CLK_FREQ APB_CLK_FREQ
/hal_espressif-3.6.0/components/soc/esp32h2/include/soc/
Dsoc.h226 #define CPU_CLK_FREQ APB_CLK_FREQ
228 #define APB_CLK_FREQ ( 32*1000000 ) macro
230 #define APB_CLK_FREQ ( 48*1000000 ) //ESP32H2-TODO: IDF-3786 macro
235 #define UART_CLK_FREQ APB_CLK_FREQ
236 #define WDT_CLK_FREQ APB_CLK_FREQ
/hal_espressif-3.6.0/components/soc/esp32s3/include/soc/
Dsoc.h236 #define CPU_CLK_FREQ APB_CLK_FREQ
237 #define APB_CLK_FREQ (80*1000000) macro
241 #define UART_CLK_FREQ APB_CLK_FREQ
242 #define WDT_CLK_FREQ APB_CLK_FREQ
/hal_espressif-3.6.0/components/soc/esp32s2/include/soc/
Dsoc.h252 #define CPU_CLK_FREQ APB_CLK_FREQ
253 #define APB_CLK_FREQ ( 80*1000000 ) //unit: Hz macro
255 #define UART_CLK_FREQ APB_CLK_FREQ
256 #define WDT_CLK_FREQ APB_CLK_FREQ
/hal_espressif-3.6.0/components/soc/esp32/include/soc/
Dsoc.h221 #define CPU_CLK_FREQ APB_CLK_FREQ //this may be incorrect, pl…
222 #define APB_CLK_FREQ ( 80*1000000 ) //unit: Hz macro
224 #define UART_CLK_FREQ APB_CLK_FREQ
225 #define WDT_CLK_FREQ APB_CLK_FREQ
/hal_espressif-3.6.0/components/bootloader_support/src/
Dbootloader_clock_init.c42 …if (rtc_clk_apb_freq_get() < APB_CLK_FREQ || esp_rom_get_reset_reason(0) != RESET_REASON_CPU0_SW) { in bootloader_clock_configure()
/hal_espressif-3.6.0/components/esp_hw_support/port/esp32/
Drtc_clk_init.c119 …REG_WRITE(SYSCON_PLL_TICK_CONF_REG, APB_CLK_FREQ / MHZ - 1); /* Under PLL, APB frequency is always… in rtc_clk_init()
/hal_espressif-3.6.0/components/esp_wifi/src/
Dwifi_init.c272 if (rtc_clk_apb_freq_get() != APB_CLK_FREQ) { in wifi_apb80m_request()
/hal_espressif-3.6.0/components/esp_timer/src/
Desp_timer_impl_lac.c247 REG_SET_FIELD(CONFIG_REG, TIMG_LACT_DIVIDER, APB_CLK_FREQ / 1000000 / TICKS_PER_US); in esp_timer_impl_early_init()
/hal_espressif-3.6.0/components/esp_hw_support/test/
Dtest_intr_alloc.c27 #define TIMER_SCALE (APB_CLK_FREQ / TIMER_DIVIDER) /*!< used to calculate counter value */
/hal_espressif-3.6.0/components/hal/esp32s2/include/hal/
Di2s_ll.h38 #define I2S_LL_BASE_CLK (2 * APB_CLK_FREQ)
Duart_ll.h98 return (hw->conf0.tick_ref_always_on) ? APB_CLK_FREQ : REF_CLK_FREQ; in uart_ll_get_sclk_freq()
/hal_espressif-3.6.0/components/hal/esp32c3/include/hal/
Di2s_ll.h29 #define I2S_LL_BASE_CLK (2*APB_CLK_FREQ)
/hal_espressif-3.6.0/components/hal/esp32/include/hal/
Di2s_ll.h40 #define I2S_LL_BASE_CLK (2 * APB_CLK_FREQ)
/hal_espressif-3.6.0/components/hal/esp32h2/include/hal/
Di2s_ll.h30 #define I2S_LL_BASE_CLK (2*APB_CLK_FREQ)
Duart_ll.h141 return APB_CLK_FREQ; in uart_ll_get_sclk_freq()
/hal_espressif-3.6.0/components/hal/esp32s3/include/hal/
Di2s_ll.h30 #define I2S_LL_BASE_CLK (2*APB_CLK_FREQ)
Duart_ll.h139 return APB_CLK_FREQ; in uart_ll_get_sclk_freq()

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