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Searched refs:dig_dbias_slp (Results 1 – 16 of 16) sorted by relevance

/hal_espressif-3.4.0/components/esp_hw_support/port/esp32h2/
Drtc_pm.c49 cfg.dig_dbias_slp = 0; in pm_set_sleep_mode()
/hal_espressif-3.4.0/components/soc/esp32/include/soc/
Drtc.h501 uint32_t dig_dbias_slp : 3; //!< set bias for digital domain, in sleep mode member
531 .dig_dbias_slp = is_dslp(sleep_flags) ? RTC_CNTL_DBIAS_0V90 \
Drtc_cntl_struct.h338 uint32_t dig_dbias_slp: 3; /*DIG_REG_DBIAS during sleep*/ member
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32c3/
Drtc_pm.c49 cfg.dig_dbias_slp = 0; in pm_set_sleep_mode()
Drtc_sleep.c129 REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG_SLEEP, cfg.dig_dbias_slp); in rtc_sleep_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s2/
Drtc_pm.c49 cfg.dig_dbias_slp = 0; in pm_set_sleep_mode()
Drtc_sleep.c129 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_SLP, cfg.dig_dbias_slp); in rtc_sleep_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32s3/
Drtc_pm.c49 cfg.dig_dbias_slp = 0; in pm_set_sleep_mode()
Drtc_sleep.c138 REGI2C_WRITE_MASK(I2C_DIG_REG, I2C_DIG_REG_EXT_DIG_DREG_SLEEP, cfg.dig_dbias_slp); in rtc_sleep_init()
/hal_espressif-3.4.0/components/esp_hw_support/port/esp32/
Drtc_pm.c47 cfg.dig_dbias_slp = 0; in pm_set_sleep_mode()
Drtc_sleep.c203 REG_SET_FIELD(RTC_CNTL_REG, RTC_CNTL_DIG_DBIAS_SLP, cfg.dig_dbias_slp); in rtc_sleep_init()
/hal_espressif-3.4.0/components/soc/esp32s2/include/soc/
Drtc.h670 uint32_t dig_dbias_slp : 3; //!< set bias for digital domain, in sleep mode member
699 .dig_dbias_slp = is_dslp(sleep_flags) ? RTC_CNTL_DIG_DBIAS_0V90 \
Drtc_cntl_struct.h424 uint32_t dig_dbias_slp: 3; /*DIG_REG_DBIAS during sleep*/ member
/hal_espressif-3.4.0/components/soc/esp32c3/include/soc/
Drtc.h645 uint32_t dig_dbias_slp : 5; //!< set bias for digital domain, in sleep mode member
677 .dig_dbias_slp = is_dslp(sleep_flags) ? RTC_CNTL_DBIAS_SLP \
/hal_espressif-3.4.0/components/soc/esp32s3/include/soc/
Drtc.h652 uint32_t dig_dbias_slp : 5; //!< set bias for digital domain, in sleep mode member
684 .dig_dbias_slp = is_dslp(sleep_flags) ? RTC_CNTL_DBIAS_SLP \
/hal_espressif-3.4.0/components/soc/esp32h2/include/soc/
Drtc.h661 uint32_t dig_dbias_slp : 5; //!< set bias for digital domain, in sleep mode member
693 .dig_dbias_slp = is_dslp(sleep_flags) ? RTC_CNTL_DBIAS_SLP \