Searched refs:chip_ver (Results 1 – 9 of 9) sorted by relevance
27 uint8_t chip_ver = 0; in bootloader_common_get_chip_revision() local30 chip_ver = 0; in bootloader_common_get_chip_revision()33 chip_ver = 1; in bootloader_common_get_chip_revision()36 chip_ver = 2; in bootloader_common_get_chip_revision()39 chip_ver = 3; in bootloader_common_get_chip_revision()42 chip_ver = 0; in bootloader_common_get_chip_revision()45 return chip_ver; in bootloader_common_get_chip_revision()
179 uint8_t chip_ver; in bootloader_flash_get_wp_pin()187 chip_ver = bootloader_common_get_chip_revision(); in bootloader_flash_get_wp_pin()188 return (chip_ver < 3) ? ESP32_D2WD_WP_GPIO : ESP32_PICO_V3_GPIO; in bootloader_flash_get_wp_pin()
40 uint8_t chip_ver = 0; in esp_efuse_get_chip_ver() local43 chip_ver = 0; in esp_efuse_get_chip_ver()46 chip_ver = 1; in esp_efuse_get_chip_ver()49 chip_ver = 2; in esp_efuse_get_chip_ver()52 chip_ver = 3; in esp_efuse_get_chip_ver()55 chip_ver = 0; in esp_efuse_get_chip_ver()58 return chip_ver; in esp_efuse_get_chip_ver()
35 uint32_t chip_ver = 0; in esp_efuse_get_chip_ver() local36 …esp_efuse_read_field_blob(ESP_EFUSE_WAFER_VERSION, &chip_ver, ESP_EFUSE_WAFER_VERSION[0]->bit_coun… in esp_efuse_get_chip_ver()37 return chip_ver; in esp_efuse_get_chip_ver()
132 uint8_t chip_ver = esp_efuse_get_chip_ver(); in rtc_clk_32k_enable_common() local134 if(chip_ver == 0 || chip_ver == 1) { in rtc_clk_32k_enable_common()148 uint8_t chip_ver = esp_efuse_get_chip_ver(); in rtc_clk_32k_enable_common() local149 if(chip_ver == 0 || chip_ver == 1) { in rtc_clk_32k_enable_common()182 uint8_t chip_ver = esp_efuse_get_chip_ver(); in rtc_clk_32k_enable() local183 if(chip_ver == 0 || chip_ver == 1) { in rtc_clk_32k_enable()188 uint8_t chip_ver = esp_efuse_get_chip_ver(); in rtc_clk_32k_enable() local189 if(chip_ver == 0 || chip_ver == 1) { in rtc_clk_32k_enable()
35 uint32_t chip_ver = 0; in esp_efuse_get_chip_ver() local37 return chip_ver; in esp_efuse_get_chip_ver()
99 def chip_ver(self): member in EspCoreDumpVersion188 if self.chip_ver in self.ESP_COREDUMP_TARGETS:189 if self.chip_ver == self.ESP32:192 if self.chip_ver in self.XTENSA_CHIPS:195 raise ESPCoreDumpLoaderError('Core dump chip "0x%x" is not supported!' % self.chip_ver)198 if self.chip_ver not in self.ESP_COREDUMP_TARGETS:200 .format(self.chip_ver, self.ESP32S2))
818 uint32_t chip_ver = REG_GET_FIELD(EFUSE_BLK0_RDATA3_REG, EFUSE_RD_CHIP_VER_PKG); in psram_enable() local819 uint32_t pkg_ver = chip_ver & 0x7; in psram_enable()
