Searched refs:REG_SPI1_CSR (Results 1 – 5 of 5) sorted by relevance
43 #define REG_SPI1_CSR (0x4000C030U) /**< \brief (SPI1) Chip Select Register */ macro55 #define REG_SPI1_CSR (*(__IO uint32_t*)0x4000C030U) /**< \brief (SPI1) Chip Select Register */ macro
45 #define REG_SPI1_CSR (0x40058030) /**< (SPI1) Chip Select Register 0 */ macro63 #define REG_SPI1_CSR (*(__IO uint32_t*)0x40058030U) /**< (SPI1) Chip Select Register 0 */ macro
45 #define REG_SPI1_CSR (0x40058030) /**< (SPI1) Chip Select Register (CS_number = 0) 0 */ macro64 #define REG_SPI1_CSR (*(__IO uint32_t*)0x40058030U) /**< (SPI1) Chip Select Register (CS… macro
45 #define REG_SPI1_CSR (0x40058030) /**< (SPI1) Chip Select Register */ macro63 #define REG_SPI1_CSR (*(__IO uint32_t*)0x40058030U) /**< (SPI1) Chip Select Register */ macro
