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Searched refs:XTENSA_MMU_L1_POS (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/arch/xtensa/core/
Dmmu.c44 l1_page[XTENSA_MMU_L1_POS(regs->ptevaddr)] = in compute_regs()
59 uint32_t vb_pte = l1_page[XTENSA_MMU_L1_POS(vecbase)]; in compute_regs()
Dptables.c230 uint32_t l1_pos = XTENSA_MMU_L1_POS(page); in map_memory_range()
369 uint32_t l1_pos = XTENSA_MMU_L1_POS((uint32_t)vaddr); in l2_page_table_map()
535 uint32_t l1_pos = XTENSA_MMU_L1_POS((uint32_t)vaddr); in l2_page_table_unmap()
754 (i == XTENSA_MMU_L1_POS(XTENSA_MMU_PTEVADDR))) { in dup_table()
852 uint32_t l1_pos = XTENSA_MMU_L1_POS(page); in region_map_update()
1050 uint32_t l1_pos = XTENSA_MMU_L1_POS(page); in page_validate()
/Zephyr-latest/arch/xtensa/include/
Dxtensa_mmu_priv.h108 #define XTENSA_MMU_L1_POS(vaddr) \ macro