Searched refs:GD32_RESET_DMA0 (Results 1 – 3 of 3) sorted by relevance
30 #define GD32_RESET_DMA0 GD32_RESET_CONFIG(AHBRST, 0U) macro
44 #define GD32_RESET_DMA0 GD32_RESET_CONFIG(AHB1RST, 21U) macro
626 resets = <&rctl GD32_RESET_DMA0>;