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Searched refs:GD32_RESET_DMA0 (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32a50x.h30 #define GD32_RESET_DMA0 GD32_RESET_CONFIG(AHBRST, 0U) macro
Dgd32f4xx.h44 #define GD32_RESET_DMA0 GD32_RESET_CONFIG(AHB1RST, 21U) macro
/Zephyr-latest/dts/arm/gd/gd32f4xx/
Dgd32f4xx.dtsi626 resets = <&rctl GD32_RESET_DMA0>;