/Zephyr-latest/include/zephyr/devicetree/ |
D | port-endpoint.h | 37 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, ports)), \ 38 (DT_CHILD(DT_INST_CHILD(inst, ports), port_##pid)), (DT_INST_CHILD(inst, port_##pid))) 89 (_DT_INST_PORT_BY_ID(inst, pid)), (DT_INST_CHILD(inst, port)))
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/Zephyr-latest/drivers/display/ |
D | display_stm32_ltdc.c | 530 .HSPolarity = (DT_PROP(DT_INST_CHILD(inst, display_timings), \ 533 .VSPolarity = (DT_PROP(DT_INST_CHILD(inst, \ 536 .DEPolarity = (DT_PROP(DT_INST_CHILD(inst, \ 539 .PCPolarity = (DT_PROP(DT_INST_CHILD(inst, \ 542 .HorizontalSync = DT_PROP(DT_INST_CHILD(inst, \ 544 .VerticalSync = DT_PROP(DT_INST_CHILD(inst, \ 546 .AccumulatedHBP = DT_PROP(DT_INST_CHILD(inst, \ 548 DT_PROP(DT_INST_CHILD(inst, \ 550 .AccumulatedVBP = DT_PROP(DT_INST_CHILD(inst, \ 552 DT_PROP(DT_INST_CHILD(inst, \ [all …]
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D | display_mcux_dcnano_lcdif.c | 308 .hsw = DT_PROP(DT_INST_CHILD(n, display_timings), \ 310 .hfp = DT_PROP(DT_INST_CHILD(n, display_timings), \ 312 .hbp = DT_PROP(DT_INST_CHILD(n, display_timings), \ 314 .vsw = DT_PROP(DT_INST_CHILD(n, display_timings), \ 316 .vfp = DT_PROP(DT_INST_CHILD(n, display_timings), \ 318 .vbp = DT_PROP(DT_INST_CHILD(n, display_timings), \ 320 .polarityFlags = (DT_PROP(DT_INST_CHILD(n, \ 324 (DT_PROP(DT_INST_CHILD(n, \ 328 (DT_PROP(DT_INST_CHILD(n, \ 332 (DT_PROP(DT_INST_CHILD(n, \
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D | display_renesas_ra.c | 355 DT_PROP(DT_INST_CHILD(id, display_timings), \ 357 DT_PROP(DT_INST_CHILD(id, display_timings), \ 359 DT_PROP(DT_INST_CHILD(id, display_timings), \ 363 DT_PROP(DT_INST_CHILD(id, display_timings), \ 366 DT_PROP(DT_INST_CHILD(id, display_timings), \ 369 DT_PROP(DT_INST_CHILD(id, display_timings), \ 373 DT_PROP(DT_INST_CHILD(id, display_timings), \ 375 DT_PROP(DT_INST_CHILD(id, display_timings), \ 377 DT_PROP(DT_INST_CHILD(id, display_timings), \ 381 DT_PROP(DT_INST_CHILD(id, display_timings), \ [all …]
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D | display_renesas_lcdc.c | 36 !!(32000000U % DT_PROP(DT_INST_CHILD(0, display_timings), clock_frequency)) 141 LCDC_SMARTBOND_CLK_DIV(DT_PROP(DT_INST_CHILD(0, display_timings), clock_frequency)); in display_smartbond_configure() 638 DT_PROP(DT_INST_CHILD(inst, display_timings), vsync_len), \ 640 DT_PROP(DT_INST_CHILD(inst, display_timings), hsync_len), \ 642 DT_PROP(DT_INST_CHILD(inst, display_timings), hfront_porch), \ 644 DT_PROP(DT_INST_CHILD(inst, display_timings), vfront_porch), \ 646 DT_PROP(DT_INST_CHILD(inst, display_timings), hback_porch), \ 648 DT_PROP(DT_INST_CHILD(inst, display_timings), vback_porch), \ 655 DT_PROP(DT_INST_CHILD(inst, display_timings), vsync_active) ? 0 : 1, \ 657 DT_PROP(DT_INST_CHILD(inst, display_timings), vsync_active) ? 0 : 1, \ [all …]
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D | display_mcux_elcdif.c | 376 .hsw = DT_PROP(DT_INST_CHILD(id, display_timings), hsync_len), \ 377 .hfp = DT_PROP(DT_INST_CHILD(id, display_timings), hfront_porch), \ 378 .hbp = DT_PROP(DT_INST_CHILD(id, display_timings), hback_porch), \ 379 .vsw = DT_PROP(DT_INST_CHILD(id, display_timings), vsync_len), \ 380 .vfp = DT_PROP(DT_INST_CHILD(id, display_timings), vfront_porch), \ 381 .vbp = DT_PROP(DT_INST_CHILD(id, display_timings), vback_porch), \ 383 (DT_PROP(DT_INST_CHILD(id, display_timings), hsync_active) \ 386 (DT_PROP(DT_INST_CHILD(id, display_timings), vsync_active) \ 389 (DT_PROP(DT_INST_CHILD(id, display_timings), de_active) \ 392 (DT_PROP(DT_INST_CHILD(id, display_timings), \
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/Zephyr-latest/drivers/regulator/ |
D | regulator_mpm54304.c | 86 DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 87 (REGULATOR_MPM54304_DEFINE(DT_INST_CHILD(inst, child), child##inst, child_name)))
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D | regulator_npm1100.c | 122 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, buck)), \ 123 (REGULATOR_NPM1100_DEFINE_BUCK(DT_INST_CHILD(inst, buck), \
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D | regulator_adp5360.c | 300 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 301 (REGULATOR_ADP5360_DEFINE(DT_INST_CHILD(inst, child), child##inst, child)), \
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D | regulator_max20335.c | 358 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 359 (REGULATOR_MAX20335_DEFINE(DT_INST_CHILD(inst, child), \
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D | regulator_axp192.c | 382 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 383 (REGULATOR_AXP192_DEFINE(DT_INST_CHILD(inst, child), child##inst, child)), ())
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D | regulator_da1469x.c | 475 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 477 DT_INST_CHILD(inst, child), child, source)), \
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D | regulator_npm6001.c | 597 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 598 (REGULATOR_NPM6001_DEFINE(DT_INST_CHILD(inst, child), child##inst, source)), \
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D | regulator_pca9420.c | 530 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 531 (REGULATOR_PCA9420_DEFINE(DT_INST_CHILD(inst, child), \
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D | regulator_npm1300.c | 664 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 665 (REGULATOR_NPM1300_DEFINE(DT_INST_CHILD(inst, child), child##inst, source)), \
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D | regulator_npm2100.c | 774 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(inst, child)), \ 775 (REGULATOR_NPM2100_DEFINE(DT_INST_CHILD(inst, child), child##inst, source)), \
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/Zephyr-latest/drivers/misc/nxp_s32_emios/ |
D | nxp_s32_emios.c | 78 DT_FOREACH_CHILD_STATUS_OKAY(DT_INST_CHILD(n, master_bus), \ 81 DT_FOREACH_CHILD_STATUS_OKAY(DT_INST_CHILD(n, master_bus), \
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/Zephyr-latest/drivers/clock_control/ |
D | clock_control_mcux_scg_k4.c | 22 #define MCUX_SCG_CLOCK_NODE(name) DT_INST_CHILD(0, name)
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D | clock_control_mcux_scg.c | 22 #define MCUX_SCG_CLOCK_NODE(name) DT_INST_CHILD(0, name)
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/Zephyr-latest/drivers/gpio/ |
D | gpio_xlnx_axi.c | 384 UTIL_AND(DT_NODE_HAS_COMPAT(DT_INST_CHILD(n, gpio2), xlnx_xps_gpio_1_00_a_gpio2), \ 385 DT_NODE_HAS_STATUS_OKAY(DT_INST_CHILD(n, gpio2))) 410 DEVICE_DT_DEFINE(DT_INST_CHILD(n, gpio2), &gpio_xlnx_axi_init, NULL, \ 426 (.other_channel_device = DEVICE_DT_GET(DT_INST_CHILD(n, gpio2))))}; \
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/Zephyr-latest/drivers/interrupt_controller/ |
D | intc_eirq_nxp_s32.c | 226 COND_CODE_1(DT_NODE_EXISTS(DT_INST_CHILD(n, irq_##idx)), \ 227 (DT_PROP_OR(DT_INST_CHILD(n, irq_##idx), max_filter_counter, \
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D | intc_wkpu_nxp_s32.c | 195 COND_CODE_1(DT_PROP(DT_INST_CHILD(n, irq_##idx), filter_enable), (BIT(idx)), (0U))
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/Zephyr-latest/drivers/flash/ |
D | flash_simulator.c | 31 #define SOC_NV_FLASH_NODE DT_INST_CHILD(0, flash_0) 33 #define SOC_NV_FLASH_NODE DT_INST_CHILD(0, flash_sim_0)
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/Zephyr-latest/drivers/ethernet/ |
D | eth_e1000.c | 25 #define PTP_INST_NODEID(n) DT_INST_CHILD(n, ptp)
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/Zephyr-latest/drivers/counter/ |
D | counter_mcux_lpc_rtc.c | 238 .rtc_dev = DEVICE_DT_GET_OR_NULL(DT_INST_CHILD(id, rtc_highres)), \
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