Lines Matching refs:DT_INST_CHILD
36 !!(32000000U % DT_PROP(DT_INST_CHILD(0, display_timings), clock_frequency))
141 LCDC_SMARTBOND_CLK_DIV(DT_PROP(DT_INST_CHILD(0, display_timings), clock_frequency)); in display_smartbond_configure()
638 DT_PROP(DT_INST_CHILD(inst, display_timings), vsync_len), \
640 DT_PROP(DT_INST_CHILD(inst, display_timings), hsync_len), \
642 DT_PROP(DT_INST_CHILD(inst, display_timings), hfront_porch), \
644 DT_PROP(DT_INST_CHILD(inst, display_timings), vfront_porch), \
646 DT_PROP(DT_INST_CHILD(inst, display_timings), hback_porch), \
648 DT_PROP(DT_INST_CHILD(inst, display_timings), vback_porch), \
655 DT_PROP(DT_INST_CHILD(inst, display_timings), vsync_active) ? 0 : 1, \
657 DT_PROP(DT_INST_CHILD(inst, display_timings), vsync_active) ? 0 : 1, \
659 DT_PROP(DT_INST_CHILD(inst, display_timings), de_active) ? 0 : 1, \
661 DT_PROP(DT_INST_CHILD(inst, display_timings), pixelclk_active) ? 0 : 1, \