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Searched refs:DEVICE_MMIO_NAMED_GET (Results 1 – 23 of 23) sorted by relevance

/Zephyr-latest/drivers/gpio/
Dgpio_mcux_rgpio.c47 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_configure()
156 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_get_raw()
167 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_set_masked_raw()
177 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_set_bits_raw()
187 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_clear_bits_raw()
197 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_toggle_bits()
209 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_pin_interrupt_configure()
260 RGPIO_Type *base = (RGPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_rgpio_port_isr()
Dgpio_rp1.c200 data->gpio_base = DEVICE_MMIO_NAMED_GET(port, reg_base) + config->gpio_offset; in gpio_rp1_init()
201 data->rio_base = DEVICE_MMIO_NAMED_GET(port, reg_base) + config->rio_offset; in gpio_rp1_init()
202 data->pads_base = DEVICE_MMIO_NAMED_GET(port, reg_base) + config->pads_offset; in gpio_rp1_init()
Dgpio_rcar.c59 return sys_read32(DEVICE_MMIO_NAMED_GET(dev, reg_base) + offs); in gpio_rcar_read()
64 sys_write32(value, DEVICE_MMIO_NAMED_GET(dev, reg_base) + offs); in gpio_rcar_write()
Dgpio_xlnx_ps.c53 dev_data->base = DEVICE_MMIO_NAMED_GET(dev, reg_base); in gpio_xlnx_ps_init()
Dgpio_brcmstb.c123 data->base = DEVICE_MMIO_NAMED_GET(port, reg_base) + config->offset; in gpio_brcmstb_init()
Dgpio_intel.c128 #define GPIO_REG_BASE_GET(dev) DEVICE_MMIO_NAMED_GET(dev, reg_base)
146 #define GPIO_REG_BASE_GET(dev) GPIO_REG_BASE(DEVICE_MMIO_NAMED_GET(dev, reg_base))
173 return GPIO_PAD_BASE(DEVICE_MMIO_NAMED_GET(dev, reg_base)); in pad_base()
Dgpio_davinci.c30 ((struct gpio_davinci_regs *)DEVICE_MMIO_NAMED_GET(dev, port_base))
Dgpio_mcux_igpio.c48 return (GPIO_Type *)DEVICE_MMIO_NAMED_GET(dev, igpio_mmio); in get_base()
Dgpio_bcm2711.c315 data->base = DEVICE_MMIO_NAMED_GET(port, reg_base); in gpio_bcm2711_init()
/Zephyr-latest/drivers/counter/
Dcounter_dw_timer.c87 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_irq_handler()
117 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, timer_mmio); in counter_dw_timer_start()
134 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, timer_mmio); in counter_dw_timer_disable()
144 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_get_top_value()
154 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_get_value()
165 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_set_top_value()
219 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_set_alarm()
271 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_cancel_alarm()
Dcounter_mcux_gpt.c43 return (GPT_Type *)DEVICE_MMIO_NAMED_GET(dev, gpt_mmio); in get_base()
Dcounter_mcux_tpm.c44 return (TPM_Type *)DEVICE_MMIO_NAMED_GET(dev, tpm_mmio); in get_base()
/Zephyr-latest/tests/kernel/device/src/
Dmmio_multireg.c69 regs_chip = DEVICE_MMIO_NAMED_GET(dev, chip); in ZTEST()
70 regs_dale = DEVICE_MMIO_NAMED_GET(dev, dale); in ZTEST()
Dmmio.c167 regs_corge = DEVICE_MMIO_NAMED_GET(dev, corge); in ZTEST()
168 regs_grault = DEVICE_MMIO_NAMED_GET(dev, grault); in ZTEST()
/Zephyr-latest/drivers/i2c/
Di2c_mcux_lpi2c.c81 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_configure()
157 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_transfer()
320 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_slave_irq_handler()
415 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_target_register()
463 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_target_unregister()
481 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_isr()
506 base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_init()
Di2c_mcux_lpi2c_rtio.c83 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_do_configure()
140 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_msg_start()
217 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_complete()
281 LPI2C_Type *base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_isr()
297 base = (LPI2C_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in mcux_lpi2c_init()
/Zephyr-latest/drivers/flash/
Dflash_cadence_qspi_nor.c128 cad_params->reg_base = DEVICE_MMIO_NAMED_GET(dev, qspi_reg); in flash_cad_init()
129 cad_params->data_base = DEVICE_MMIO_NAMED_GET(dev, qspi_data); in flash_cad_init()
Dflash_cadence_nand.c210 nand_param->nand_base = DEVICE_MMIO_NAMED_GET(nand_dev, nand_reg); in flash_cdns_nand_init()
211 nand_param->sdma_base = DEVICE_MMIO_NAMED_GET(nand_dev, sdma); in flash_cdns_nand_init()
/Zephyr-latest/drivers/spi/
Dspi_mcux_lpspi.c98 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_isr()
117 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_transfer_next_packet()
149 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_configure()
314 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_dma_tx_load()
335 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_dma_rx_load()
432 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in transceive_dma_sync()
489 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in transceive_dma()
551 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in spi_mcux_iodev_start()
656 LPSPI_Type *base = (LPSPI_Type *)DEVICE_MMIO_NAMED_GET(dev, reg_base); in transceive()
/Zephyr-latest/include/zephyr/sys/
Ddevice_mmio.h565 #define DEVICE_MMIO_NAMED_GET(dev, name) \ macro
568 #define DEVICE_MMIO_NAMED_GET(dev, name) \ macro
/Zephyr-latest/drivers/dma/
Ddma_dw_axi.c266 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_get_ch_status()
292 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_isr()
643 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_start()
705 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_stop()
754 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_resume()
785 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_suspend()
/Zephyr-latest/drivers/sdhc/
Dsdhc_cdns.c168 data->params.reg_base = DEVICE_MMIO_NAMED_GET(dev, reg_base); in sdhc_cdns_init()
169 data->params.reg_phy = DEVICE_MMIO_NAMED_GET(dev, combo_phy); in sdhc_cdns_init()
/Zephyr-latest/drivers/misc/timeaware_gpio/
Dtimeaware_gpio_intel.c64 return DEVICE_MMIO_NAMED_GET(dev, reg_base); in regs()