| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_renesas_cpg_mssr.c | 27 sys_write32(~val, base_address + CPGWPR); in rcar_cpg_write()
28 sys_write32(val, base_address + reg); in rcar_cpg_write()
50 sys_write32(reg_val, base_address + mstpcr[reg]); in rcar_cpg_mstp_clock_endisable()
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| D | clock_agilex_ll.c | 19 #define mmio_write_32(addr, data) sys_write32((data), (addr))
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| D | clock_control_wch_rcc.c | 56 sys_write32(val, reg); in clock_control_wch_rcc_on()
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| /Zephyr-latest/drivers/i2s/ |
| D | i2s_litex.c | 228 sys_write32(*(src + i), I2S_TX_FIFO_ADDR); in i2s_copy_to_fifo()
232 sys_write32(*((uint16_t *)(src + i)), I2S_TX_FIFO_ADDR); in i2s_copy_to_fifo()
249 sys_write32(data, I2S_TX_FIFO_ADDR); in i2s_copy_to_fifo()
254 sys_write32(data, I2S_TX_FIFO_ADDR); in i2s_copy_to_fifo()
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| /Zephyr-latest/drivers/syscon/ |
| D | syscon.c | 107 sys_write32(val, (base_address + reg)); in syscon_generic_write_reg()
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| /Zephyr-latest/drivers/entropy/ |
| D | entropy_neorv32_trng.c | 41 sys_write32(ctrl, config->base); in neorv32_trng_write_ctrl()
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| /Zephyr-latest/drivers/dma/ |
| D | dma_pl330.c | 112 sys_write32(dmac_higher_addr, in dma_pl330_cfg_dmac_add_control()
278 sys_write32(((ch << DMA_INTSR1_SHIFT) + in dma_pl330_start_dma_ch()
283 sys_write32(channel_cfg->dma_exec_addr, in dma_pl330_start_dma_ch()
286 sys_write32(0x0, reg_base + DMAC_PL330_DBGCMD); in dma_pl330_start_dma_ch()
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_intel_blinky.c | 78 sys_write32(val, rt->reg_base + cfg->reg_offset); in bk_intel_set_cycles()
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| D | pwm_xlnx_axi_timer.c | 62 sys_write32(value, config->base + offset); in xlnx_axi_timer_write32()
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| /Zephyr-latest/soc/nxp/s32/common/ |
| D | mc_rgm.c | 61 #define REG_WRITE(r, v) sys_write32((v), (mem_addr_t)(DT_INST_REG_ADDR(0) + (r)))
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| D | mc_me.c | 80 #define REG_WRITE(r, v) sys_write32((v), (mem_addr_t)(DT_INST_REG_ADDR(0) + (r)))
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| /Zephyr-latest/drivers/gpio/ |
| D | gpio_altera_pio.c | 145 sys_write32(mask, addr); in gpio_altera_port_set_bits_raw()
179 sys_write32(mask, addr); in gpio_altera_port_clear_bits_raw()
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| D | gpio_brcmstb.c | 103 sys_write32(reg_data, data->base + GIO_DATA); in gpio_brcmstb_port_toggle_bits()
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| D | gpio_creg_gpio.c | 77 sys_write32(out, drv_data->base_addr); in port_write()
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| D | gpio_neorv32.c | 52 sys_write32(val, config->output); in neorv32_gpio_write()
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| /Zephyr-latest/include/zephyr/arch/nios2/ |
| D | nios2.h | 165 sys_write32(data, in _nios2_reg_write()
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| /Zephyr-latest/drivers/timer/ |
| D | ti_dmtimer.c | 51 sys_write32(reg_val, reg); in ti_dm_timer_write_masks()
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| /Zephyr-latest/drivers/reset/ |
| D | reset_rpi_pico.c | 57 sys_write32(value, base_address + offset); in reset_rpi_write_register()
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| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_gicv3_its.c | 87 sys_write32(reg, data->base + GITS_CTLR); in its_force_quiescent()
308 sys_write32(wr_idx, data->base + GITS_CWRITER); in its_post_command()
645 sys_write32(reg, data->base + GITS_CTLR); in gicv3_its_init()
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| /Zephyr-latest/drivers/sensor/microchip/mchp_tach_xec/ |
| D | tach_mchp_xec.c | 124 sys_write32(pcr_val, addr); in tach_xec_sleep_clr()
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| /Zephyr-latest/drivers/pcie/endpoint/ |
| D | pcie_ep_iproc_msi.c | 203 sys_write32(BIT(WR_ADDR_CHK_INTR_EN), in iproc_pcie_vector_mask_isr()
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| /Zephyr-latest/include/zephyr/arch/x86/ |
| D | arch.h | 135 static ALWAYS_INLINE void sys_write32(uint32_t data, mm_reg_t addr) in sys_write32() function
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| /Zephyr-latest/drivers/spi/ |
| D | spi_ambiq_bleif.c | 204 sys_write32((sys_read32(addr) | DT_INST_PHA(n, ambiq_pwrcfg, mask)), addr); \
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| /Zephyr-latest/soc/nxp/s32/s32k3/ |
| D | pmc.c | 91 #define REG_WRITE(r, v) sys_write32((v), (mem_addr_t)(DT_INST_REG_ADDR(0) + (r)))
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| /Zephyr-latest/drivers/serial/ |
| D | uart_neorv32.c | 79 sys_write32(ctrl, config->base + NEORV32_UART_CTRL_OFFSET); in neorv32_uart_write_ctrl()
99 sys_write32(data, config->base + NEORV32_UART_DATA_OFFSET); in neorv32_uart_write_data()
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