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/Zephyr-latest/soc/espressif/common/
DKconfig22 The Simple Boot is a booting method that doesn't need a 2nd stage bootloader.
/Zephyr-latest/boards/adafruit/qt_py_rp2040/
Dadafruit_qt_py_rp2040.dts49 /* Reserved memory for the second stage bootloader */
/Zephyr-latest/include/zephyr/drivers/usb/
Duhc.h132 unsigned int stage : 2; member
Dudc.h289 int stage; member
/Zephyr-latest/include/zephyr/linker/common-rom/
Dcommon-rom-kernel-devices.ld28 * Later on, during the second linking stage (when zephyr.elf is
/Zephyr-latest/boards/waveshare/esp32s3_touch_lcd_1_28/doc/
Dindex.rst82 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/doc/services/storage/disk/
Dnvme.rst75 At this stage then, it is up to the user to make sure the buffer address being provided to
/Zephyr-latest/modules/hal_rpi_pico/
DCMakeLists.txt16 # stage bootloader should be compiled.
/Zephyr-latest/boards/heltec/heltec_wireless_stick_lite_v3/doc/
Dindex.rst13 - ESP32-S3FN8 low-power MCU-based SoC (dual-core Xtensa® 32-bit LX7 microprocessor, five stage pipe…
147 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/boards/01space/esp32c3_042_oled/doc/
Dindex.rst73 The board can be loaded using a single binary image, without 2nd stage bootloader.
/Zephyr-latest/boards/adafruit/macropad_rp2040/
Dadafruit_macropad_rp2040.dts141 /* Reserved memory for the second stage bootloader */
/Zephyr-latest/arch/arm64/core/
DKconfig266 bool "Set VMPIDR_EL2 at EL2 stage"
270 This register may already be set by bootloader at the EL2 stage, if
/Zephyr-latest/share/zephyr-package/cmake/
Dzephyr_package_search.cmake49 # - VERSION_CHECK : This is the version check stage by CMake find package
/Zephyr-latest/boards/franzininho/esp32s2_franzininho/doc/
Dindex.rst53 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/boards/seeed/xiao_esp32c3/doc/
Dindex.rst55 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/boards/m5stack/stamp_c3/doc/
Dindex.rst36 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/arch/arc/
DKconfig386 bool "Make early stage SoC-specific initialization"
388 Call SoC per-core setup code on early stage initialization
/Zephyr-latest/
DCMakeLists.txt48 # zephyr_pre0: First linking stage
49 # zephyr_pre1: Second linking stage
50 # zephyr_final: Final linking stage
52 # There will at minimum be a single linking stage.
53 # When only a single linking stage is required, the `zephyr_pre0` will be mapped
63 # placed at the second linking stage.
75 # existing variable to allow slowly cleanup of linking stage handling.
76 # Three stage linking active: pre0 -> pre1 -> final, this will correspond to `pre1`
77 # Two stage linking active: pre0 -> final, this will correspond to `pre0`
1620 # generation stage.
/Zephyr-latest/boards/hardkernel/odroid_go/doc/
Dindex.rst79 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/arch/x86/core/
DKconfig.ia3231 already appropriately set by an earlier bootloader stage, in which
/Zephyr-latest/boards/lilygo/ttgo_t7v1_5/doc/
Dindex.rst72 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/samples/subsys/usb/dfu/
DREADME.rst19 partition layout. You SoC must run MCUboot as the stage 1 bootloader.
/Zephyr-latest/boards/seeed/xiao_esp32c6/doc/
Dindex.rst57 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/boards/others/esp32c3_supermini/doc/
Dindex.rst68 The board could be loaded using the single binary image, without 2nd stage bootloader.
/Zephyr-latest/boards/lilygo/ttgo_t8c3/doc/
Dindex.rst80 The board could be loaded using the single binary image, without 2nd stage bootloader.

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