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2169 mcs_inst->read_params.single.handle = mcs_inst->player_name_handle; in bt_mcc_read_player_name()2170 mcs_inst->read_params.single.offset = 0U; in bt_mcc_read_player_name()2208 mcs_inst->read_params.single.handle = mcs_inst->icon_obj_id_handle; in bt_mcc_read_icon_obj_id()2209 mcs_inst->read_params.single.offset = 0U; in bt_mcc_read_icon_obj_id()2248 mcs_inst->read_params.single.handle = mcs_inst->icon_url_handle; in bt_mcc_read_icon_url()2249 mcs_inst->read_params.single.offset = 0U; in bt_mcc_read_icon_url()2288 mcs_inst->read_params.single.handle = mcs_inst->track_title_handle; in bt_mcc_read_track_title()2289 mcs_inst->read_params.single.offset = 0U; in bt_mcc_read_track_title()2328 mcs_inst->read_params.single.handle = mcs_inst->track_duration_handle; in bt_mcc_read_track_duration()2329 mcs_inst->read_params.single.offset = 0U; in bt_mcc_read_track_duration()[all …]
124 read_params[conn_id].single.handle = bt_gatt_attr_value_handle(attr); in discover_func()125 read_params[conn_id].single.offset = 0; in discover_func()
39 External single-ended 32KHz waveform to MEC172x XTAL2 input50 External single-ended 32KHz waveform to MEC172x 32KHZ_IN pin
21 # FPU (single precision) options
11 which would prevent multiple erase tasks running in a single ``west flash`` invocation, which17 Flashing configuration is singular, it will only be read from a single location, this26 Configuration is applied in the yml file by using a ``runners`` map with a single ``run_once``98 both applications and will only perform a single device recovery operation when programming the
158 ctx.params.single.handle = handle; in bt_testlib_att_read_by_handle_sync()159 ctx.params.single.offset = offset; in bt_testlib_att_read_by_handle_sync()182 ctx.params.single.handle = handle; in bt_testlib_gatt_long_read()183 ctx.params.single.offset = offset; in bt_testlib_gatt_long_read()
1 # This is an ST NUCLEO-L053R8 board with single STM32L053R8 chip.
1 # This is an ST NUCLEO-L073RZ board with single STM32L073RZ chip.
144 static uint8_t single; in dequeue() local146 if (!single) { in dequeue()147 single = 1U; in dequeue()
35 Lists may be modified by adding a single node at the head or tail with71 single "next" pointer.91 single-linked list variants using the same basic primitives. The120 .. doxygengroup:: single-linked-list_apis125 .. doxygengroup:: flagged-single-linked-list_apis
23 - 1 single frame buffer in RENESAS RA GLCDC driver.
193 .single = {201 .single = {376 chan_1_read.single.handle = chrc_handle; in test_main_common()377 chan_2_read.single.handle = chrc_handle; in test_main_common()
12 a manufacturer data element. The content of the data is a single byte
23 The kernel also supports the atomic manipulation of a single bit73 A single bit in array of atomic variables can be manipulated using106 requires the manipulation of a single 32-bit value.
27 single printk() call, preventing the output data from32 bool "Multi producer, single consumer packet buffer"40 bool "Single producer, single consumer packet buffer"
15 * single thread
11 and target select) and three configurations: single IO, dual IO and quad IO.
6 The nrf52832_mdk board is a fully open-source, versatile single board
31 single instance share the SCSI buffer.
13 data is a single byte indicating how many advertising packets the device
72 # This platform has a single big DRAM region where most linkage96 # This single-core device doesn't have S32C1I and so has no built-in
7 single output stream. Formatter is using 16 byte frames which wraps up to 15 bytes of
24 * LPADC0 CH2A is set up in single ended mode
87 itself does not use these registers. This allows single task per91 .. [#f5] Single-thread kernel is support only for single core targets105 application developer to both pin the thread to a single CPU before it
45 This board configuration uses a single serial communication channel with the
