| /Zephyr-latest/drivers/gpio/ |
| D | gpio_grgpio2.c | 48 uint32_t mask = 1 << pin; in pin_configure() local
75 regs->output_or = mask; in pin_configure()
77 regs->output_and = ~mask; in pin_configure()
79 regs->dir_or = mask; in pin_configure()
82 regs->dir_and = ~mask; in pin_configure()
97 gpio_port_pins_t mask, in port_set_masked_raw() argument
106 value &= mask; in port_set_masked_raw()
108 port_val = (regs->output & ~mask) | value; in port_set_masked_raw()
159 const uint32_t mask = 1 << pin; in pin_interrupt_configure() local
163 if ((mask & data->imask) == 0) { in pin_interrupt_configure()
[all …]
|
| D | gpio_sn74hc595.c | 78 static int gpio_sn74hc595_port_set_masked_raw(const struct device *dev, uint32_t mask, in gpio_sn74hc595_port_set_masked_raw() argument
89 if ((drv_data->output & mask) != (mask & value)) { in gpio_sn74hc595_port_set_masked_raw()
90 output = (drv_data->output & ~mask) | (mask & value); in gpio_sn74hc595_port_set_masked_raw()
105 static int gpio_sn74hc595_port_set_bits_raw(const struct device *dev, uint32_t mask) in gpio_sn74hc595_port_set_bits_raw() argument
107 return gpio_sn74hc595_port_set_masked_raw(dev, mask, mask); in gpio_sn74hc595_port_set_bits_raw()
110 static int gpio_sn74hc595_port_clear_bits_raw(const struct device *dev, uint32_t mask) in gpio_sn74hc595_port_clear_bits_raw() argument
112 return gpio_sn74hc595_port_set_masked_raw(dev, mask, 0U); in gpio_sn74hc595_port_clear_bits_raw()
115 static int gpio_sn74hc595_port_toggle_bits(const struct device *dev, uint32_t mask) in gpio_sn74hc595_port_toggle_bits() argument
123 toggled_output = drv_data->output ^ mask; in gpio_sn74hc595_port_toggle_bits()
130 drv_data->output ^= mask; in gpio_sn74hc595_port_toggle_bits()
|
| D | gpio_tle9104.c | 119 static int tle9104_gpio_port_set_masked_raw(const struct device *dev, uint32_t mask, uint32_t value) in tle9104_gpio_port_set_masked_raw() argument
125 if (config->parallel_mode_out12 && (BIT(1) & mask) != 0) { in tle9104_gpio_port_set_masked_raw()
130 if (config->parallel_mode_out34 && (BIT(3) & mask) != 0) { in tle9104_gpio_port_set_masked_raw()
141 data->state = (data->state & ~mask) | (mask & value); in tle9104_gpio_port_set_masked_raw()
148 static int tle9104_gpio_port_set_bits_raw(const struct device *dev, uint32_t mask) in tle9104_gpio_port_set_bits_raw() argument
150 return tle9104_gpio_port_set_masked_raw(dev, mask, mask); in tle9104_gpio_port_set_bits_raw()
153 static int tle9104_gpio_port_clear_bits_raw(const struct device *dev, uint32_t mask) in tle9104_gpio_port_clear_bits_raw() argument
155 return tle9104_gpio_port_set_masked_raw(dev, mask, 0); in tle9104_gpio_port_clear_bits_raw()
158 static int tle9104_gpio_port_toggle_bits(const struct device *dev, uint32_t mask) in tle9104_gpio_port_toggle_bits() argument
164 if (config->parallel_mode_out12 && (BIT(1) & mask) != 0) { in tle9104_gpio_port_toggle_bits()
[all …]
|
| D | gpio_cmsdk_ahb.c | 59 uint32_t mask, in gpio_cmsdk_ahb_port_set_masked_raw() argument
64 cfg->port->dataout = (cfg->port->dataout & ~mask) | (mask & value); in gpio_cmsdk_ahb_port_set_masked_raw()
70 uint32_t mask) in gpio_cmsdk_ahb_port_set_bits_raw() argument
74 cfg->port->dataout |= mask; in gpio_cmsdk_ahb_port_set_bits_raw()
80 uint32_t mask) in gpio_cmsdk_ahb_port_clear_bits_raw() argument
84 cfg->port->dataout &= ~mask; in gpio_cmsdk_ahb_port_clear_bits_raw()
90 uint32_t mask) in gpio_cmsdk_ahb_port_toggle_bits() argument
94 cfg->port->dataout ^= mask; in gpio_cmsdk_ahb_port_toggle_bits()
99 static int cmsdk_ahb_gpio_config(const struct device *dev, uint32_t mask, in cmsdk_ahb_gpio_config() argument
124 gpio_cmsdk_ahb_port_set_bits_raw(dev, mask); in cmsdk_ahb_gpio_config()
[all …]
|
| D | gpio_bd8lb600fs.c | 106 static int bd8lb600fs_gpio_port_set_masked_raw(const struct device *dev, uint32_t mask, in bd8lb600fs_gpio_port_set_masked_raw() argument
118 data->state = (data->state & ~mask) | (mask & value); in bd8lb600fs_gpio_port_set_masked_raw()
127 static int bd8lb600fs_gpio_port_set_bits_raw(const struct device *dev, uint32_t mask) in bd8lb600fs_gpio_port_set_bits_raw() argument
129 return bd8lb600fs_gpio_port_set_masked_raw(dev, mask, mask); in bd8lb600fs_gpio_port_set_bits_raw()
132 static int bd8lb600fs_gpio_port_clear_bits_raw(const struct device *dev, uint32_t mask) in bd8lb600fs_gpio_port_clear_bits_raw() argument
134 return bd8lb600fs_gpio_port_set_masked_raw(dev, mask, 0); in bd8lb600fs_gpio_port_clear_bits_raw()
137 static int bd8lb600fs_gpio_port_toggle_bits(const struct device *dev, uint32_t mask) in bd8lb600fs_gpio_port_toggle_bits() argument
148 data->state ^= mask; in bd8lb600fs_gpio_port_toggle_bits()
|
| D | gpio_nrfx.c | 65 static int gpio_nrfx_gpd_retain_set(const struct device *port, uint32_t mask, gpio_flags_t flags) in gpio_nrfx_gpd_retain_set() argument
74 nrf_gpio_port_retain_enable(cfg->port, mask); in gpio_nrfx_gpd_retain_set()
84 ARG_UNUSED(mask); in gpio_nrfx_gpd_retain_set()
91 static int gpio_nrfx_gpd_retain_clear(const struct device *port, uint32_t mask) in gpio_nrfx_gpd_retain_clear() argument
104 nrf_gpio_port_retain_disable(cfg->port, mask); in gpio_nrfx_gpd_retain_clear()
108 ARG_UNUSED(mask); in gpio_nrfx_gpd_retain_clear()
255 gpio_port_pins_t mask, in gpio_nrfx_port_set_masked_raw() argument
261 const uint32_t set_mask = value & mask; in gpio_nrfx_port_set_masked_raw()
262 const uint32_t clear_mask = (~set_mask) & mask; in gpio_nrfx_port_set_masked_raw()
264 ret = gpio_nrfx_gpd_retain_clear(port, mask); in gpio_nrfx_port_set_masked_raw()
[all …]
|
| D | gpio_cc32xx.c | 64 uint32_t mask);
66 uint32_t mask);
116 uint32_t mask, in gpio_cc32xx_port_set_masked_raw() argument
122 MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)value); in gpio_cc32xx_port_set_masked_raw()
128 uint32_t mask) in gpio_cc32xx_port_set_bits_raw() argument
133 MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)mask); in gpio_cc32xx_port_set_bits_raw()
139 uint32_t mask) in gpio_cc32xx_port_clear_bits_raw() argument
144 MAP_GPIOPinWrite(port_base, (unsigned char)mask, (unsigned char)~mask); in gpio_cc32xx_port_clear_bits_raw()
150 uint32_t mask) in gpio_cc32xx_port_toggle_bits() argument
156 value = MAP_GPIOPinRead(port_base, mask); in gpio_cc32xx_port_toggle_bits()
[all …]
|
| /Zephyr-latest/dts/arm/nuvoton/npcx/npcx4/ |
| D | npcx4-miwus-int-map.dtsi | 21 group-mask = <0x01>;
26 group-mask = <0x08>;
31 group-mask = <0x10>;
36 group-mask = <0x20>;
41 group-mask = <0x40>;
46 group-mask = <0x80>;
57 group-mask = <0x10>;
62 group-mask = <0x20>;
67 group-mask = <0x40>;
72 group-mask = <0x80>;
|
| /Zephyr-latest/soc/atmel/sam/common/ |
| D | soc_gpio.h | 86 uint32_t mask; /** pin(s) bit mask */ member
143 pin->regs->OVRS = pin->mask; in soc_gpio_set()
145 pin->regs->PIO_SODR = pin->mask; in soc_gpio_set()
161 pin->regs->OVRC = pin->mask; in soc_gpio_clear()
163 pin->regs->PIO_CODR = pin->mask; in soc_gpio_clear()
179 return pin->regs->PVR & pin->mask; in soc_gpio_get()
181 return pin->regs->PIO_PDSR & pin->mask; in soc_gpio_get()
209 pin->regs->STERS = pin->mask; in soc_gpio_debounce_length_set()
211 pin->regs->STERC = pin->mask; in soc_gpio_debounce_length_set()
|
| /Zephyr-latest/include/zephyr/drivers/interrupt_controller/ |
| D | wuc_ite_it8xxx2.h | 20 void it8xxx2_wuc_enable(const struct device *dev, uint8_t mask);
29 void it8xxx2_wuc_disable(const struct device *dev, uint8_t mask);
38 void it8xxx2_wuc_clear_status(const struct device *dev, uint8_t mask);
47 void it8xxx2_wuc_set_polarity(const struct device *dev, uint8_t mask,
|
| /Zephyr-latest/drivers/rtc/ |
| D | rtc_handlers.c | 28 uint16_t *mask) in z_vrfy_rtc_alarm_get_supported_fields() argument
31 K_OOPS(K_SYSCALL_MEMORY_WRITE(mask, sizeof(uint16_t))); in z_vrfy_rtc_alarm_get_supported_fields()
32 return z_impl_rtc_alarm_get_supported_fields(dev, id, mask); in z_vrfy_rtc_alarm_get_supported_fields()
36 static inline int z_vrfy_rtc_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask, in z_vrfy_rtc_alarm_set_time() argument
41 return z_impl_rtc_alarm_set_time(dev, id, mask, timeptr); in z_vrfy_rtc_alarm_set_time()
45 static inline int z_vrfy_rtc_alarm_get_time(const struct device *dev, uint16_t id, uint16_t *mask, in z_vrfy_rtc_alarm_get_time() argument
49 K_OOPS(K_SYSCALL_MEMORY_WRITE(mask, sizeof(uint16_t))); in z_vrfy_rtc_alarm_get_time()
51 return z_impl_rtc_alarm_get_time(dev, id, mask, timeptr); in z_vrfy_rtc_alarm_get_time()
|
| D | rtc_sam.c | 228 static uint32_t rtc_atmel_timalr_from_tm(const struct rtc_time *timeptr, uint32_t mask) in rtc_atmel_timalr_from_tm() argument
232 if (mask & RTC_ALARM_TIME_MASK_SECOND) { in rtc_atmel_timalr_from_tm()
237 if (mask & RTC_ALARM_TIME_MASK_MINUTE) { in rtc_atmel_timalr_from_tm()
242 if (mask & RTC_ALARM_TIME_MASK_HOUR) { in rtc_atmel_timalr_from_tm()
250 static uint32_t rtc_atmel_calalr_from_tm(const struct rtc_time *timeptr, uint32_t mask) in rtc_atmel_calalr_from_tm() argument
254 if (mask & RTC_ALARM_TIME_MASK_MONTH) { in rtc_atmel_calalr_from_tm()
259 if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { in rtc_atmel_calalr_from_tm()
269 uint32_t mask = 0; in rtc_sam_alarm_mask_from_timalr() local
272 mask |= RTC_ALARM_TIME_MASK_SECOND; in rtc_sam_alarm_mask_from_timalr()
276 mask |= RTC_ALARM_TIME_MASK_MINUTE; in rtc_sam_alarm_mask_from_timalr()
[all …]
|
| D | rtc_numaker.c | 167 uint16_t *mask) in rtc_numaker_alarm_get_supported_fields() argument
172 *mask = RTC_ALARM_TIME_MASK_SECOND in rtc_numaker_alarm_get_supported_fields()
182 static int rtc_numaker_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask, in rtc_numaker_alarm_set_time() argument
197 if ((mask != 0) && (timeptr == NULL)) { in rtc_numaker_alarm_set_time()
201 if (mask & ~mask_capable) { in rtc_numaker_alarm_set_time()
205 if (rtc_utils_validate_rtc_time(timeptr, mask) == false) { in rtc_numaker_alarm_set_time()
212 if ((mask == 0) || (timeptr == NULL)) { in rtc_numaker_alarm_set_time()
214 rtc_base->SPR[0] = mask; in rtc_numaker_alarm_set_time()
234 if (mask & RTC_ALARM_TIME_MASK_YEAR) { in rtc_numaker_alarm_set_time()
238 if (mask & RTC_ALARM_TIME_MASK_MONTH) { in rtc_numaker_alarm_set_time()
[all …]
|
| D | rtc_smartbond.c | 293 static uint32_t alarm_calendar_to_bcd(const struct rtc_time *timeptr, uint16_t mask) in alarm_calendar_to_bcd() argument
297 if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { in alarm_calendar_to_bcd()
302 if (mask & RTC_ALARM_TIME_MASK_MONTH) { in alarm_calendar_to_bcd()
314 static inline uint32_t alarm_time_to_bcd(const struct rtc_time *timeptr, uint16_t mask) in alarm_time_to_bcd() argument
318 if (mask & RTC_ALARM_TIME_MASK_SECOND) { in alarm_time_to_bcd()
323 if (mask & RTC_ALARM_TIME_MASK_MINUTE) { in alarm_time_to_bcd()
328 if (mask & RTC_ALARM_TIME_MASK_HOUR) { in alarm_time_to_bcd()
357 static uint32_t tm_to_rtc_alarm_mask(uint16_t mask) in tm_to_rtc_alarm_mask() argument
361 if (mask & RTC_ALARM_TIME_MASK_SECOND) { in tm_to_rtc_alarm_mask()
364 if (mask & RTC_ALARM_TIME_MASK_MINUTE) { in tm_to_rtc_alarm_mask()
[all …]
|
| D | rtc_emul.c | 26 uint16_t mask; member
153 if (alarm->mask == 0) { in rtc_emul_test_alarms()
157 if ((alarm->mask & RTC_ALARM_TIME_MASK_SECOND) && in rtc_emul_test_alarms()
162 if ((alarm->mask & RTC_ALARM_TIME_MASK_MINUTE) && in rtc_emul_test_alarms()
167 if ((alarm->mask & RTC_ALARM_TIME_MASK_HOUR) && in rtc_emul_test_alarms()
172 if ((alarm->mask & RTC_ALARM_TIME_MASK_MONTHDAY) && in rtc_emul_test_alarms()
177 if ((alarm->mask & RTC_ALARM_TIME_MASK_MONTH) && in rtc_emul_test_alarms()
182 if ((alarm->mask & RTC_ALARM_TIME_MASK_WEEKDAY) && in rtc_emul_test_alarms()
282 uint16_t *mask) in rtc_emul_alarm_get_supported_fields() argument
290 *mask = (RTC_ALARM_TIME_MASK_SECOND in rtc_emul_alarm_get_supported_fields()
[all …]
|
| D | rtc_rpi_pico.c | 30 static int rtc_rpi_pico_alarm_get_time(const struct device *dev, uint16_t id, uint16_t *mask,
176 static int rtc_rpi_pico_alarm_set_time(const struct device *dev, uint16_t id, uint16_t mask, in rtc_rpi_pico_alarm_set_time() argument
185 if (mask & ~mask_available) { in rtc_rpi_pico_alarm_set_time()
189 if (!rtc_utils_validate_rtc_time(alarm, mask)) { in rtc_rpi_pico_alarm_set_time()
196 if (mask == 0) { in rtc_rpi_pico_alarm_set_time()
207 if (mask & RTC_ALARM_TIME_MASK_YEAR) { in rtc_rpi_pico_alarm_set_time()
212 if (mask & RTC_ALARM_TIME_MASK_MONTH) { in rtc_rpi_pico_alarm_set_time()
217 if (mask & RTC_ALARM_TIME_MASK_MONTHDAY) { in rtc_rpi_pico_alarm_set_time()
222 if (mask & RTC_ALARM_TIME_MASK_WEEKDAY) { in rtc_rpi_pico_alarm_set_time()
227 if (mask & RTC_ALARM_TIME_MASK_HOUR) { in rtc_rpi_pico_alarm_set_time()
[all …]
|
| /Zephyr-latest/soc/nxp/imxrt/imxrt5xx/f1/include/ |
| D | _soc_inthandlers.h | 116 static inline int _xtensa_handle_one_int1(unsigned int mask) in _xtensa_handle_one_int1() argument
120 mask &= XCHAL_INTLEVEL1_MASK; in _xtensa_handle_one_int1()
122 if (mask & BIT(i)) { in _xtensa_handle_one_int1()
123 mask = BIT(i); in _xtensa_handle_one_int1()
131 return mask; in _xtensa_handle_one_int1()
134 static inline int _xtensa_handle_one_int2(unsigned int mask) in _xtensa_handle_one_int2() argument
138 mask &= XCHAL_INTLEVEL2_MASK; in _xtensa_handle_one_int2()
140 if (mask & BIT(i)) { in _xtensa_handle_one_int2()
141 mask = BIT(i); in _xtensa_handle_one_int2()
149 return mask; in _xtensa_handle_one_int2()
[all …]
|
| /Zephyr-latest/soc/renesas/rzt2m/ |
| D | soc.h | 60 void rzt2m_unlock_prcrn(uint32_t mask);
61 void rzt2m_lock_prcrn(uint32_t mask);
62 void rzt2m_unlock_prcrs(uint32_t mask);
63 void rzt2m_lock_prcrs(uint32_t mask);
65 void rzt2m_set_sckcr2(uint32_t mask);
67 void rzt2m_set_sckcr(uint32_t mask);
|
| /Zephyr-latest/dts/arm/nuvoton/npcx/npcx9/ |
| D | npcx9-miwus-int-map.dtsi | 21 group-mask = <0x01>;
26 group-mask = <0x08>;
31 group-mask = <0x10>;
36 group-mask = <0x20>;
41 group-mask = <0x40>;
46 group-mask = <0x80>;
57 group-mask = <0x20>;
62 group-mask = <0x40>;
|
| /Zephyr-latest/drivers/interrupt_controller/ |
| D | intc_sam0_eic.c | 103 uint32_t mask; in sam0_eic_acquire() local
115 mask = BIT(line_index); in sam0_eic_acquire()
176 EIC->INTFLAG.reg = mask; in sam0_eic_acquire()
210 uint32_t mask; in sam0_eic_release() local
221 mask = BIT(line_index); in sam0_eic_release()
245 EIC->INTENCLR.reg = mask; in sam0_eic_release()
246 EIC->INTFLAG.reg = mask; in sam0_eic_release()
257 uint32_t mask; in sam0_eic_enable_interrupt() local
269 mask = BIT(line_index); in sam0_eic_enable_interrupt()
270 EIC->INTFLAG.reg = mask; in sam0_eic_enable_interrupt()
[all …]
|
| /Zephyr-latest/drivers/audio/ |
| D | wm8904.c | 32 static void wm8904_update_reg(const struct device *dev, uint8_t reg, uint16_t mask, uint16_t val);
187 uint16_t mask in wm8904_out_update() argument
192 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT2_LEFT, mask, val); in wm8904_out_update()
196 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT2_RIGHT, mask, val); in wm8904_out_update()
200 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT1_LEFT, mask, val); in wm8904_out_update()
204 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT1_RIGHT, mask, val); in wm8904_out_update()
208 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT1_LEFT, mask, val); in wm8904_out_update()
209 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT1_RIGHT, mask, val); in wm8904_out_update()
210 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT2_LEFT, mask, val); in wm8904_out_update()
211 wm8904_update_reg(dev, WM8904_REG_ANALOG_OUT2_RIGHT, mask, val); in wm8904_out_update()
[all …]
|
| /Zephyr-latest/tests/drivers/can/api/src/ |
| D | common.c | 122 .mask = CAN_STD_ID_MASK
132 .mask = CAN_STD_ID_MASK
142 .mask = TEST_CAN_STD_MASK
152 .mask = TEST_CAN_STD_MASK
162 .mask = CAN_EXT_ID_MASK
172 .mask = CAN_EXT_ID_MASK
182 .mask = TEST_CAN_EXT_MASK
192 .mask = TEST_CAN_EXT_MASK
202 .mask = CAN_STD_ID_MASK
|
| /Zephyr-latest/subsys/net/pkt_filter/ |
| D | ethernet.c | 15 struct net_eth_addr *mask) in addr_mask_compare() argument
18 if ((addr1->addr[i] & mask->addr[i]) != in addr_mask_compare()
19 (addr2->addr[i] & mask->addr[i])) { in addr_mask_compare()
31 struct net_eth_addr *mask = &test_eth_addr->mask; in addr_match() local
35 if (addr_mask_compare(addr, pkt_addr, mask)) { in addr_match()
|
| /Zephyr-latest/drivers/serial/ |
| D | uart_mcux_lpsci.c | 123 uint32_t mask = kLPSCI_TxDataRegEmptyInterruptEnable; in mcux_lpsci_irq_tx_enable() local
125 LPSCI_EnableInterrupts(config->base, mask); in mcux_lpsci_irq_tx_enable()
131 uint32_t mask = kLPSCI_TxDataRegEmptyInterruptEnable; in mcux_lpsci_irq_tx_disable() local
133 LPSCI_DisableInterrupts(config->base, mask); in mcux_lpsci_irq_tx_disable()
147 uint32_t mask = kLPSCI_TxDataRegEmptyInterruptEnable; in mcux_lpsci_irq_tx_ready() local
150 return (LPSCI_GetEnabledInterrupts(config->base) & mask) in mcux_lpsci_irq_tx_ready()
157 uint32_t mask = kLPSCI_RxDataRegFullInterruptEnable; in mcux_lpsci_irq_rx_enable() local
159 LPSCI_EnableInterrupts(config->base, mask); in mcux_lpsci_irq_rx_enable()
165 uint32_t mask = kLPSCI_RxDataRegFullInterruptEnable; in mcux_lpsci_irq_rx_disable() local
167 LPSCI_DisableInterrupts(config->base, mask); in mcux_lpsci_irq_rx_disable()
[all …]
|
| /Zephyr-latest/tests/subsys/llext/src/ |
| D | export_dependent_ext.c | 18 unsigned long mask = BIT(half_ptr_bits) - 1; in test_entry() local
19 int a = mask & (uintptr_t)test_entry; in test_entry()
20 int b = mask & ((uintptr_t)test_entry >> half_ptr_bits); in test_entry()
|
