| /Zephyr-latest/subsys/net/ip/ |
| D | utils.c | 175 bool mapped = false; in z_impl_net_addr_ntop() local
183 mapped = true; in z_impl_net_addr_ntop()
238 if (mapped && (i > 5)) { in z_impl_net_addr_ntop()
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| D | Kconfig | 173 bool "Support IPv4 mapped on IPv6 addresses"
176 Support v4-mapped-on-v6 address type. This allows IPv4 and IPv6
179 be mapped to IPv6. This is turned off by default which means
363 be mapped to this traffic class so that higher prioritized packets
385 be mapped to this traffic class so that higher prioritized packets
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| /Zephyr-latest/lib/libc/newlib/ |
| D | Kconfig | 15 int "Maximum memory mapped for newlib heap"
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| /Zephyr-latest/lib/posix/options/ |
| D | Kconfig.mem | 29 bool "POSIX memory-mapped files"
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| D | shm.c | 36 bool mapped: 1; member
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| /Zephyr-latest/tests/net/socket/misc/src/ |
| D | main.c | 744 struct sockaddr_in6 mapped; in test_ipv4_mapped_to_ipv6_server() local
773 &mapped.sin6_addr); in test_ipv4_mapped_to_ipv6_server()
825 zassert_mem_equal(&mapped.sin6_addr, &net_sin6(&addr)->sin6_addr, in test_ipv4_mapped_to_ipv6_server()
828 net_sprint_ipv6_addr(&mapped.sin6_addr), in test_ipv4_mapped_to_ipv6_server()
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| /Zephyr-latest/drivers/pcie/host/ |
| D | Kconfig | 35 PCIe Controllers allowing all outgoing I/O and MEM TLPs to be mapped
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| /Zephyr-latest/samples/subsys/display/lvgl/ |
| D | README.rst | 22 of this sample, the coordinates are mapped to the center of the screen.
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| /Zephyr-latest/dts/x86/intel/ |
| D | raptor_lake_s.dtsi | 345 io-mapped;
350 io-mapped;
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| D | alder_lake.dtsi | 382 io-mapped;
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| /Zephyr-latest/doc/services/binary_descriptors/ |
| D | index.rst | 126 #. Memory mapped flash - If the flash where the image to be read resides in flash and is
128 This option uses the least amount of RAM, but will not work if the flash is not memory mapped,
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| /Zephyr-latest/doc/services/input/ |
| D | gpio-kbd.rst | 156 mapped, for example on an I2C or SPI port expander, as this significantly
206 mapped to normal key events using the :dtcompatible:`input-keymap` driver.
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| /Zephyr-latest/arch/xtensa/core/ |
| D | README_MMU.txt | 44 ## Virtually-mapped Page Tables
67 of which might be mapped in physical memory) are a linear array of
248 page mapped within the same cache line, or to change the tables) then
260 mapped. Page table changes in the data cache of one CPU will be
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| /Zephyr-latest/subsys/mgmt/updatehub/ |
| D | Kconfig | 112 This value is mapped directly to enum coap_block_size.
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| /Zephyr-latest/doc/services/device_mgmt/smp_groups/ |
| D | smp_group_2.rst | 120 | | entry name is mapped to value it represents in statistics. |
|
| /Zephyr-latest/tests/kernel/threads/thread_stack/src/ |
| D | main.c | 338 scenario_data.stack_mapped = test_thread.stack_info.mapped.addr; in stest_thread_launch()
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| /Zephyr-latest/include/zephyr/arch/x86/intel64/ |
| D | linker.ld | 50 /* Special page containing supervisor data that is still mapped in
|
| /Zephyr-latest/doc/build/dts/ |
| D | intro-syntax-structure.rst | 172 Memory-mapped peripherals
191 Memory-mapped flash
261 - Devices accessed via memory-mapped I/O registers (like ``i2c@40003000``):
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| /Zephyr-latest/boards/nxp/frdm_rw612/doc/ |
| D | index.rst | 144 The bus used to access the SRAM is determined using two separate memory mapped address spaces.
|
| /Zephyr-latest/soc/espressif/esp32/ |
| D | default_appcpu.ld | 40 /* Flash segments (rodata and text) should be mapped in the virtual address spaces.
391 /* Create an explicit section at the end of all the data that shall be mapped into drom.
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| /Zephyr-latest/doc/kernel/drivers/ |
| D | index.rst | 110 example, base memory mapped IO addresses, IRQ line numbers, or other fixed
436 On some systems, the linear address of peripheral memory-mapped I/O (MMIO)
442 the MMIO range must be mapped into the page tables at some virtual
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| /Zephyr-latest/boards/pjrc/teensy4/doc/ |
| D | index.rst | 291 …By default console output is mapped to teensy pins 0 (RX1) and 1 (TX1). Connect a usb-to-serial ad…
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| /Zephyr-latest/soc/cdns/dc233c/include/ |
| D | xtensa-dc233c.ld | 140 * mapped in TLB manually. This manual entry will
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| /Zephyr-latest/arch/arm/ |
| D | Kconfig | 30 functions are mapped to the SoC interrupt control interface, which is
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| /Zephyr-latest/boards/st/stm32wb5mm_dk/doc/ |
| D | stm32wb5mm_dk.rst | 163 STM32WB5MM-DK has two user buttons. The first button is mapped to PC12,
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