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| /Zephyr-latest/samples/subsys/fs/littlefs/ |
| D | README.rst | 12 * count the number of times the system has booted
80 This example has been devised and initially tested on :zephyr:board:`nucleo_h743zi`
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| /Zephyr-latest/doc/services/tracing/ |
| D | index.rst | 13 Every system has application-specific events to trace out. Historically,
14 that has implied:
232 Tracealyzer has built-in support for SEGGER RTT to receive trace data using a J-Link probe.
338 at startup, once the TraceRecorder library has been initialized. This is recommended when using the
387 be attached after the system has crashed using ``west attach`` after which the
525 means data-transmission has completed with the return of the
561 means data-reception has completed with the return of the call.
593 - The system has non-atomic write and one shared channel
598 - The system has non-atomic write but many channels
605 - The system has atomic write but one shared channel
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| /Zephyr-latest/boards/heltec/heltec_wifi_lora32_v2/doc/ |
| D | index.rst | 7 integrated product based on ESP32 + SX127x, it has Wi-Fi, BLE, LoRa functions, also Li-Po battery m…
150 After the board has automatically reset and booted, you should see the following
190 The onboard OLED display is of type ``ssd1306``, has 128*64 pixels and is
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| /Zephyr-latest/boards/arduino/opta/doc/ |
| D | index.rst | 90 has access to bus clock activation and deactivation.
108 option bytes configuration. The OPTA has a DFU capable bootloader which
118 Zephyr flash configuration has been set to be compatible with the
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| /Zephyr-latest/boards/others/neorv32/doc/ |
| D | index.rst | 38 The default board configuration assumes the NEORV32 CPU implementation has the
49 The default board configuration assumes the NEORV32 SoC implementation has a 64k
57 The default board configuration assumes the NEORV32 SoC implementation has a 64k
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| /Zephyr-latest/boards/seeed/xiao_esp32s3/doc/ |
| D | index.rst | 27 has an USB-C port for programming and debugging, integrated battery charging
201 After the board has automatically reset and booted, you should see the following
214 ESP32-S3 has a built-in JTAG circuitry and can be debugged without any additional chip. Only an USB…
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| /Zephyr-latest/boards/olimex/olimex_esp32_evb/doc/ |
| D | index.rst | 7 Espressif ESP32-WROOM-32E/UE module. It has a wired 100Mbit/s Ethernet Interface,
11 The board can operate from a single LiPo backup battery as it has an internal
174 After the board has automatically reset and booted, you should see the following
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| /Zephyr-latest/boards/mediatek/ |
| D | index.rst | 12 Development has been done on and validation performed on at least
53 ``mtk_adsp_load.py`` python script, which has no dependencies outside
90 with gdb_stub, which has support on Xtensa and via the SDK debuggers,
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| /Zephyr-latest/boards/nxp/frdm_mcxa156/doc/ |
| D | index.rst | 98 The MCX-A156 SoC has 5 gpio controllers and has pinmux registers which
118 The FRDM-MCXA156 SoC has 5 LPUART interfaces for serial communication.
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| /Zephyr-latest/doc/services/logging/ |
| D | index.rst | 47 has set of dedicated macros. Logger API also has macros for logging data.
404 Memory is allocated from a circular packet buffer (:ref:`mpsc_pbuf`), which has
412 A log message has following format:
529 This option is not always possible as it requires that each domain has an available backend
546 * The *end domain* has the logging core implementation and a cross-domain
548 * The *relay domain* has one or more links to other domains but does not
549 have backends that output logs to the user. It has a cross-domain backend either to
551 * The *root domain* has one or multiple links and a backend that outputs logs
563 each core has both a Secure and a Nonsecure domain. If *core A nonsecure* (A_NS) is the
564 root domain, it has two links: one to *core A secure* (A_NS-A_S) and one to
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| /Zephyr-latest/arch/ |
| D | Kconfig | 306 which has significantly restricted permissions and must interact
374 Select this option if the architecture has upward growing thread
755 This option is enabled when the CPU has support for Trusted
756 Execution Environment (e.g. when it has a security attribution
762 This option is enabled when the processor hardware has support for
768 This option is enabled when the CPU has hardware floating point
774 This option is enabled when the CPU has hardware DSP unit.
780 When enabled, this indicates that the CPU has a double floating point
786 This option is enabled when the CPU has a Memory Protection Unit (MPU).
791 This hidden option is selected when the CPU has a Memory Management Unit
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| /Zephyr-latest/boards/st/nucleo_h745zi_q/doc/ |
| D | index.rst | 115 Nucleo H745ZI-Q board has 4 UARTs and 4 USARTs. The Zephyr console output is
125 has access to bus clock activation and deactivation.
144 Check if the board's ST-LINK V3 has the newest FW version. It can be updated
176 Zephyr flash configuration has been set to meet these default settings.
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| /Zephyr-latest/samples/subsys/usb_c/source/ |
| D | README.rst | 24 The sample has been tested on ``stm32g081b_eval``.
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| /Zephyr-latest/boards/arm/mps3/ |
| D | mps3_corstone300_fvp_ns.dts | 78 * project has defined for that board - a single image boot is
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| D | mps3_corstone310_an555_ns.dts | 78 * project has defined for that board - a single image boot is
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| D | mps3_corstone310_fvp_ns.dts | 78 * project has defined for that board - a single image boot is
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| D | mps3_corstone300_an552_ns.dts | 78 * project has defined for that board - a single image boot is
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| /Zephyr-latest/drivers/firmware/scmi/ |
| D | Kconfig | 52 bool "Transport layer has static channels"
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| /Zephyr-latest/boards/rakwireless/rak5010/ |
| D | rak5010_nrf52840.dts | 120 has-dpd;
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| /Zephyr-latest/cmake/modules/ |
| D | FindLlvmLld.cmake | 22 # See if the compiler has a preferred linker
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| /Zephyr-latest/drivers/ieee802154/ |
| D | Kconfig.mcr20a | 73 might need it too). And of course it has to start before the net stack.
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| /Zephyr-latest/doc/kernel/services/other/ |
| D | thread_local_storage.rst | 8 thread has its own copy of these variables.
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| /Zephyr-latest/doc/kernel/iterable_sections/ |
| D | index.rst | 35 Then the linker has to be setup to place the structure in a
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| /Zephyr-latest/boards/nordic/thingy53/doc/ |
| D | index.rst | 10 for the Thingy:53 board. The board has the nRF5340 MCU processor, a set of
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| /Zephyr-latest/tests/subsys/edac/ibecc/ |
| D | README.rst | 38 enabled for production. Due to this reason test has production configuration
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