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/Zephyr-latest/soc/espressif/esp32/
DKconfig.defconfig7 default $(dt_node_reg_size_int,/soc/flash-controller@3ff42000/flash@0,0)
10 default $(dt_node_reg_addr_hex,/soc/flash-controller@3ff42000/flash@0)
/Zephyr-latest/dts/arm/st/h7/
Dstm32h757Xi_m4.dtsi18 flash-controller@52002000 {
19 flash1: flash@8100000 {
21 bank2-flash-size = <1024>;
Dstm32h745Xi_m4.dtsi18 flash-controller@52002000 {
19 flash1: flash@8100000 {
21 bank2-flash-size = <1024>;
Dstm32h755Xi_m4.dtsi18 flash-controller@52002000 {
19 flash1: flash@8100000 {
21 bank2-flash-size = <1024>;
/Zephyr-latest/dts/arm/renesas/ra/ra4/
Dr7fa4m1ab3cfp.dtsi13 flash-controller@407e0000 {
14 flash0: flash@0 {
15 compatible = "soc-nv-flash";
Dr7fa4m1ab3cfm.dtsi17 flash-controller@407e0000 {
18 flash0: flash@0 {
19 compatible = "soc-nv-flash";
/Zephyr-latest/doc/services/storage/nvs/
Dnvs.rst6 Elements, represented as id-data pairs, are stored in flash using a
7 FIFO-managed circular buffer. The flash area is divided into sectors. Elements
9 new sector in the flash area is prepared for use (erased). Before erasing the
14 at least one id-data pair stored in flash at all time.
19 Each element is stored in flash as metadata (8 byte) and data. The metadata is
36 of the metadata. Data that is written in flash without metadata is ignored
39 During initialization NVS will verify the data stored in flash, if it
42 NVS checks the id-data pair before writing data to flash. If the id-data pair
43 is unchanged no write to flash is performed.
45 To protect the flash area against frequent erases it is important that there is
[all …]
/Zephyr-latest/dts/xtensa/espressif/esp32/
Desp32_wrover_e_n8r8.dtsi12 gpio-reserved-ranges = <6 6>, <16 2>, // flash&psram
20 /* 8MB flash */
25 /* 8MB flash */
/Zephyr-latest/drivers/flash/
DKconfig.sam1 # Atmel SAM flash driver config
7 bool "Atmel SAM flash driver"
15 Enable the Atmel SAM series internal flash driver.
DKconfig.mcux4 bool "MCUX flash shim driver"
17 Enables the MCUX flash shim driver.
19 the duration of the flash erase/write operations. This will
29 Do a margin check flash command before reading an area.
43 menu "Flexspi flash driver"
84 Select the MX25UM51345G octal flash operation mode(Octal I/O STR
102 Copy the data to a RAM buffer before writing it to the flash.
104 flash itself.
111 Copy the data to a RAM buffer before writing it to the flash.
113 flash itself.
DKconfig.gecko1 # Silicon Labs Gecko flash driver config
7 bool "Silicon Labs Gecko flash driver"
16 Enable Silicon Labs Gecko series internal flash driver.
DKconfig.siwx91x5 bool "Silicon Labs SiWx91x flash driver"
14 Enable flash controller for flash embedded on Silicon Labs SiWx91x
Dflash_hp_ra.h32 #define FLASH_HP_CF_BLOCK_32KB_LINEAR_END (DT_PROP(DT_NODELABEL(flash), block_32kb_linear_end))
37 #define FLASH_HP_CF_NUM_BLOCK_RESERVED (DT_PROP(DT_NODELABEL(flash), reserved_area_num))
41 #define FLASH_HP_CF_BLOCK_32KB_DUAL_LOW_END (DT_PROP(DT_NODELABEL(flash), block_32kb_dual_low_end))
43 (DT_PROP(DT_NODELABEL(flash), block_32kb_dual_high_end))
DKconfig.rv32m15 bool "RV32M1 flash shim driver"
12 Enables the RV32M1 flash shim driver.
14 the duration of the flash erase/write operations. This will
/Zephyr-latest/boards/intel/common/
Defi_boot.rst8 Prepare a USB flash drive to boot the Zephyr application image on
11 #. Format the USB flash drive as FAT32.
13 On Windows, open ``File Explorer``, and right-click on the USB flash drive.
18 the USB flash drive as FAT32. Alternatively, under terminal, find out
19 the corresponding device node for the USB flash drive (for example,
28 the USB flash drive. Or else you may erase other storage devices
36 Boot the board to the EFI shell with USB flash drive connected.
38 #. Insert the prepared boot device (USB flash drive) into the board.
/Zephyr-latest/samples/subsys/shell/fs/
DREADME.rst5 Access a LittleFS file system partition in flash using the file system shell.
10 This example provides shell access to a LittleFS file system partition in flash.
31 Which by default will use the flash simulator. The flash simulator will use a file,
32 :file:`flash.bin`, in the current directory to keep the flash content.
46 you will also have the flash filesystem mounted and accessible from your Linux host filesystem.
88 If you want to use the 'flash load' command then build the sample with the
105 Loading filesystem from host PC to flash memory
112 flash load <address> <size>
114 It allows loading the data via UART, directly into flash memory at a given
115 address. Data must be aligned to a value dependent on the target flash memory,
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/Zephyr-latest/dts/arm/nuvoton/
Dnpcx7m7fc.dtsi11 flash0: flash@10070000 {
14 * because the internal flash size is 512 KB.
19 flash1: flash@64000000 {
48 /* quad spi bus configuration of nor flash device */
Dnpcx4m3f.dtsi11 flash0: flash@10088000 {
15 flash1: flash@60000000 {
38 /* quad spi bus configuration of nor flash device */
Dnpcx4m8f.dtsi11 flash0: flash@10060000 {
15 flash1: flash@60000000 {
38 /* quad spi bus configuration of nor flash device */
/Zephyr-latest/dts/arm/silabs/
Dsim3u.dtsi13 zephyr,flash-controller = &flash;
87 flash: flash-controller@4002e000 { label
88 compatible = "silabs,si32-flash-controller";
94 flash0: flash@0 {
95 compatible = "soc-nv-flash";
/Zephyr-latest/boards/shields/v2c_daplink/
Dv2c_daplink_cfg.overlay11 zephyr,flash = &daplink_flash0_v2c_daplink_cfg;
15 daplink_flash0_v2c_daplink_cfg: flash@0 {
16 compatible = "soc-nv-flash";
/Zephyr-latest/doc/services/storage/flash_map/
Dexample_fragment.dts7 flashctrl: flash-controller@deadbeef {
8 flash0: flash@0 {
9 compatible = "soc-nv-flash";
/Zephyr-latest/tests/drivers/flash/common/
DKconfig8 int "Size of flash device under test"
11 Expected flash device size the test will validate against. If the flash driver does not
/Zephyr-latest/dts/arm/nxp/
Dnxp_ke17z.dtsi14 zephyr,flash-controller = &ftfa;
34 ftfa: flash-controller@40020000 {
42 flash0: flash@0 {
43 compatible = "soc-nv-flash";
/Zephyr-latest/drivers/eeprom/
DKconfig.eeprom_emu10 Enable emulated (on flash) EEPROM support. This mimics an external
11 EEPROM on a flash partition. The number of writes that can be
12 performed to the EEPROM is maximized by using a flash area that is

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