Home
last modified time | relevance | path

Searched refs:driven (Results 51 – 75 of 191) sorted by relevance

12345678

/Zephyr-latest/boards/st/nucleo_f446ze/doc/
Dindex.rst129 Nucleo F446ZE System Clock could be driven by an internal or external oscillator,
130 as well as the main PLL clock. By default, the System clock is driven by the PLL clock at 84MHz,
131 driven by an 8MHz high-speed external clock.
/Zephyr-latest/boards/adi/eval_adin1110ebz/doc/
Dindex.rst108 EVAL-ADIN1110EBZ System Clock could be driven by an internal or external oscillator, as well as
109 the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz, driven by the
/Zephyr-latest/boards/st/nucleo_h753zi/doc/
Dindex.rst111 Nucleo H753ZI System Clock could be driven by an internal or external
113 driven by the PLL clock at 96MHz, driven by an 8MHz high-speed external clock.
/Zephyr-latest/boards/st/nucleo_h7a3zi_q/doc/
Dindex.rst101 Nucleo H7A3ZI-Q System Clock could be driven by an internal or external
103 driven by the PLL clock at 96MHz, driven by an 8MHz high-speed external clock.
/Zephyr-latest/boards/alientek/pandora_stm32l475/doc/
Dindex.rst110 STM32L475 Pandora System Clock could be driven by an internal or external oscillator,
111 as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
112 driven by 16MHz high speed internal oscillator.
/Zephyr-latest/boards/st/stm32f429i_disc1/doc/
Dindex.rst105 The STM32F429I-DISC1 System Clock could be driven by an internal or external oscillator,
106 as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 168MHz,
107 driven by an 8MHz high speed external clock.
/Zephyr-latest/boards/witte/linum/doc/
Dindex.rst300 Linum H753ZI System Clock could be driven by an internal or external
302 driven by the PLL clock at 480MHz, driven by an 25MHz high-speed external clock.
/Zephyr-latest/boards/st/nucleo_f746zg/doc/
Dindex.rst116 Nucleo F746ZG System Clock could be driven by an internal or external
118 driven by the PLL clock at 72MHz, driven by an 8MHz high-speed external clock.
/Zephyr-latest/boards/st/nucleo_f767zi/doc/
Dindex.rst122 Nucleo F767ZI System Clock could be driven by an internal or external
124 driven by the PLL clock at 72MHz, driven by an 8MHz high-speed external clock.
/Zephyr-latest/boards/st/nucleo_h743zi/doc/
Dindex.rst110 Nucleo H743ZI System Clock could be driven by an internal or external
112 driven by the PLL clock at 96MHz, driven by an 8MHz high-speed external clock.
/Zephyr-latest/boards/adi/eval_adin2111ebz/doc/
Dindex.rst108 EVAL-ADIN2111EBZ System Clock could be driven by an internal or external oscillator, as well as the
109 main PLL clock. By default the System clock is driven by the PLL clock at 80MHz, driven by the
/Zephyr-latest/boards/st/nucleo_l432kc/doc/
Dindex.rst125 Nucleo L432KC System Clock could be driven by internal or external oscillator,
126 as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz,
127 driven by 16MHz high speed internal oscillator.
/Zephyr-latest/boards/st/nucleo_l433rc_p/doc/
Dindex.rst128 Nucleo L433RC-P System Clock could be driven by internal or external oscillator,
129 as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz,
130 driven by 16MHz high speed internal oscillator.
/Zephyr-latest/boards/st/nucleo_f303k8/doc/
Dindex.rst93 The Nucleo F303K8 System Clock can be driven by an internal or
95 System Clock is driven by the PLL clock at 72 MHz. The input to the
/Zephyr-latest/drivers/serial/
DKconfig.nrfx_uart_instance115 int "Asynchronous to interrupt driven adaptation layer RX buffer size"
124 int "Asynchronous to interrupt driven adaptation layer RX buffer count"
/Zephyr-latest/boards/st/nucleo_f302r8/doc/
Dindex.rst101 The Nucleo F302R8 System Clock can be driven by an internal or
103 System Clock is driven by the PLL clock at 72 MHz. The input to the
/Zephyr-latest/boards/st/nucleo_f303re/doc/
Dindex.rst98 The Nucleo F303RE System Clock can be driven by an internal or
100 System Clock is driven by the PLL clock at 72 MHz. The input to the
/Zephyr-latest/boards/st/stm32h735g_disco/doc/
Dindex.rst56 The STM32H735G System Clock can be driven by an internal or external oscillator,
58 is driven by the PLL clock at 550MHz. PLL clock is feed by a 25MHz high speed external clock.
/Zephyr-latest/boards/arduino/opta/doc/
Dindex.rst78 The STM32H747I System Clock can be driven by an internal or external oscillator,
80 is driven at 240MHz. PLL clock is fed by a 25MHz high speed external clock. The
81 M7 clock is driven at 400MHz.
/Zephyr-latest/boards/st/stm32f7508_dk/doc/
Dindex.rst122 The STM32F7508 System Clock can be driven by an internal or external oscillator,
123 as well as by the main PLL clock. By default, the System clock is driven by the PLL
124 clock at 216MHz, driven by a 25MHz high speed external clock.
/Zephyr-latest/boards/st/stm32l476g_disco/doc/
Dindex.rst124 STM32L476G Discovery System Clock could be driven by an internal or external oscillator,
125 as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
126 driven by 16MHz high speed internal oscillator.
/Zephyr-latest/boards/st/stm32f769i_disco/doc/
Dindex.rst117 The STM32F769I System Clock can be driven by an internal or external oscillator,
118 as well as by the main PLL clock. By default, the System clock is driven by the PLL
119 clock at 216MHz, driven by a 25MHz high speed external clock.
/Zephyr-latest/boards/st/stm32f746g_disco/doc/
Dindex.rst127 The STM32F746G System Clock can be driven by an internal or external oscillator,
128 as well as by the main PLL clock. By default, the System clock is driven by the PLL
129 clock at 216MHz, driven by a 25MHz high speed external clock.
/Zephyr-latest/boards/st/sensortile_box/doc/
Dindex.rst96 SensorTile.box System Clock could be driven by internal or external
98 driven by the PLL clock at 80MHz, driven by the 16MHz external oscillator.
/Zephyr-latest/boards/st/nucleo_g474re/doc/
Dindex.rst136 Nucleo G474RE System Clock could be driven by internal or external oscillator,
137 as well as main PLL clock. By default System clock is driven by PLL clock at 150MHz,
138 driven by 16MHz high speed internal oscillator. The clock can be boosted to 170MHz if boost mode

12345678