| /Zephyr-latest/samples/net/gptp/src/ |
| D | gptp.c | 33 struct gptp_domain *domain; in get_current_status() local
39 domain = gptp_get_domain(); in get_current_status()
41 ret = gptp_get_port_data(domain, port, &port_ds, in get_current_status()
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| /Zephyr-latest/drivers/power_domain/ |
| D | power_domain_soc_state_change.c | 23 const struct device *domain; member
32 if (!dev->pm || (dev->pm_base->domain != visitor_context->domain)) { in pd_domain_visitor()
51 struct pd_visitor_context context = {.domain = dev}; in pd_pm_action()
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| D | power_domain_gpio.c | 29 const struct device *domain; member
40 if (!dev->pm || (dev->pm_base->domain != visitor_context->domain)) { in pd_on_domain_visitor()
54 struct pd_visitor_context context = {.domain = dev}; in pd_gpio_pm_action()
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| D | power_domain_gpio_monitor.c | 29 const struct device *domain; member
38 if (!dev->pm || (dev->pm_base->domain != visitor_context->domain)) { in pd_on_domain_visitor()
53 struct pd_visitor_context context = {.domain = dev}; in pd_gpio_monitor_callback()
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_renesas_cpg_mssr.h | 18 uint32_t domain; member
52 .domain = CPG_CORE, \
66 .domain = CPG_MOD, \
133 uint32_t domain,
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| /Zephyr-latest/include/zephyr/pm/ |
| D | device.h | 152 const struct device *domain; member
210 .domain = DEVICE_DT_GET_OR_NULL(DT_PHANDLE(_node_id, \
594 const struct device *domain);
609 const struct device *domain);
695 const struct device *domain) in pm_device_power_domain_add() argument
698 ARG_UNUSED(domain); in pm_device_power_domain_add()
703 const struct device *domain) in pm_device_power_domain_remove() argument
706 ARG_UNUSED(domain); in pm_device_power_domain_remove()
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| /Zephyr-latest/drivers/serial/ |
| D | Kconfig.xen | 16 for Zephyr as unprivileged domain.
25 privileged domain (Dom0) or for Zephyr DomU in Dom0less
27 privileged domain. Thus, there is no console daemon and Xen
28 manages all domain outputs through the consoleio interface.
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| /Zephyr-latest/soc/microchip/mec/common/ |
| D | soc_pcr.h | 15 #define MCHP_XEC_PCR_SCR_ENCODE(slp_idx, bitpos, domain) \ argument
16 ((((uint32_t)(domain) & 0xff) << 24) | (((bitpos) & 0x1f) << 3) \
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| /Zephyr-latest/arch/x86/core/ |
| D | x86_mmu.c | 1203 struct arch_mem_domain *domain = in range_map() local
1206 ret2 = range_map_ptables(domain->ptables, virt, phys, size, in range_map()
1586 int arch_mem_domain_partition_remove(struct k_mem_domain *domain, in arch_mem_domain_partition_remove() argument
1591 if (domain != current_domain) { in arch_mem_domain_partition_remove()
1595 ptn = &domain->partitions[partition_id]; in arch_mem_domain_partition_remove()
1601 int arch_mem_domain_partition_add(struct k_mem_domain *domain, in arch_mem_domain_partition_add() argument
1606 if (domain != current_domain) { in arch_mem_domain_partition_add()
1610 ptn = &domain->partitions[partition_id]; in arch_mem_domain_partition_add()
1803 int arch_mem_domain_init(struct k_mem_domain *domain) in arch_mem_domain_init() argument
1808 LOG_DBG("%s(%p)", __func__, domain); in arch_mem_domain_init()
[all …]
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| /Zephyr-latest/tests/misc/llext-edk/src/ |
| D | main.c | 51 struct k_mem_domain *domain, in load_and_run_extension() argument
64 llext_add_domain(*ext, domain); in load_and_run_extension()
70 k_mem_domain_add_thread(domain, thread); in load_and_run_extension()
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| /Zephyr-latest/arch/xtensa/core/ |
| D | mpu.c | 750 int arch_mem_domain_init(struct k_mem_domain *domain) in arch_mem_domain_init() argument
752 domain->arch.mpu_map = xtensa_mpu_map_fg_kernel; in arch_mem_domain_init()
771 int arch_mem_domain_partition_remove(struct k_mem_domain *domain, in arch_mem_domain_partition_remove() argument
777 struct xtensa_mpu_map *map = &domain->arch.mpu_map; in arch_mem_domain_partition_remove()
778 struct k_mem_partition *partition = &domain->partitions[partition_id]; in arch_mem_domain_partition_remove()
850 if (cur_thread->mem_domain_info.mem_domain == domain) { in arch_mem_domain_partition_remove()
858 int arch_mem_domain_partition_add(struct k_mem_domain *domain, in arch_mem_domain_partition_add() argument
863 struct xtensa_mpu_map *map = &domain->arch.mpu_map; in arch_mem_domain_partition_add()
864 struct k_mem_partition *partition = &domain->partitions[partition_id]; in arch_mem_domain_partition_add()
887 (cur_thread->mem_domain_info.mem_domain == domain)) { in arch_mem_domain_partition_add()
[all …]
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| /Zephyr-latest/tests/subsys/logging/log_core_additional/src/ |
| D | log_test.c | 33 ZTEST_BMEM uint8_t domain, level; variable
106 zassert_equal(log_msg_get_domain(&(msg->log)), domain, in process()
508 domain = 3; in ZTEST()
511 z_log_msg_runtime_create(domain, __log_current_const_data, in ZTEST()
515 Z_LOG_MSG_STACK_CREATE(0, domain, __log_current_const_data, in ZTEST()
536 domain = 3; in ZTEST_USER()
539 z_log_msg_runtime_create(domain, NULL, in ZTEST_USER()
543 Z_LOG_MSG_STACK_CREATE(0, domain, NULL, in ZTEST_USER()
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| /Zephyr-latest/dts/arm/st/h7/ |
| D | stm32h743.dtsi | 65 /* System data RAM accessible over AXI bus: AXI SRAM in D1 domain */
71 /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
78 /* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
85 /* System data RAM accessible over AHB bus: SRAM3 in D2 domain */
92 /* System data RAM accessible over AHB bus: SRAM4 in D3 domain */
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| /Zephyr-latest/subsys/pm/ |
| D | device_runtime.c | 17 (_pm)->domain
140 const struct device *domain = PM_DOMAIN(&pm->base); in get_sync_locked() local
142 if (domain->pm_base->flags & BIT(PM_DEVICE_FLAG_ISR_SAFE)) { in get_sync_locked()
143 ret = pm_device_runtime_get(domain); in get_sync_locked()
209 const struct device *domain = PM_DOMAIN(&pm->base); in pm_device_runtime_get() local
211 if (domain != NULL) { in pm_device_runtime_get()
212 ret = pm_device_runtime_get(domain); in pm_device_runtime_get()
218 (void)pm_device_runtime_put(domain); in pm_device_runtime_get()
301 const struct device *domain = PM_DOMAIN(&pm->base); in put_sync_locked() local
303 if (domain->pm_base->flags & BIT(PM_DEVICE_FLAG_ISR_SAFE)) { in put_sync_locked()
[all …]
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| /Zephyr-latest/subsys/net/lib/dns/ |
| D | dns_sd.c | 86 + DNS_LABEL_LEN_SIZE + strlen(ref->domain) in service_proto_size()
249 static bool domain_is_valid(const char *domain) in domain_is_valid() argument
253 if (domain == NULL) { in domain_is_valid()
258 domain_size = strlen(domain); in domain_is_valid()
261 domain, domain_size, DNS_SD_DOMAIN_MIN_SIZE); in domain_is_valid()
267 domain, domain_size, DNS_SD_DOMAIN_MAX_SIZE); in domain_is_valid()
271 if (!label_is_valid(domain, domain_size)) { in domain_is_valid()
273 domain); in domain_is_valid()
294 && domain_is_valid(inst->domain) in rec_is_valid()
368 inst->domain, in add_ptr_record()
[all …]
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| /Zephyr-latest/doc/kernel/usermode/ |
| D | memory_domain.rst | 85 the same memory domain. This is the minimum required for architectures to
152 buffer, plus program text and read-only data. The memory domain APIs are the
155 Conceptually, a memory domain is a collection of some number of memory
156 partitions. The maximum number of memory partitions in a domain
165 accessing such a region. Any attempt to use memory domain APIs to control
169 Memory domain APIs are only available to supervisor mode. The only control
171 will automatically become members of the parent's domain.
173 All threads are members of a memory domain, including supervisor threads
175 default domain ``k_mem_domain_default`` which will be assigned to threads if
176 they have not been specifically assigned to a domain, or inherited a memory
[all …]
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| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
| D | f4_sdmmc48_pll.overlay | 9 /* select one source for the clk48MHz domain clock */
26 /* select one source for the sdmmc domain clock */
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| /Zephyr-latest/samples/subsys/llext/edk/app/src/ |
| D | main.c | 117 struct k_mem_domain *domain, in run_extension_on_thread() argument
131 llext_add_domain(*ext, domain); in run_extension_on_thread()
136 k_mem_domain_add_thread(domain, thread); in run_extension_on_thread()
137 k_mem_domain_add_thread(domain, subscriber_thread_id); in run_extension_on_thread()
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| /Zephyr-latest/tests/subsys/pm/power_domain_soc_state_change/ |
| D | app.overlay | 31 compatible = "power-domain-soc-state-change";
34 #power-domain-cells = <0>;
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| /Zephyr-latest/tests/kernel/device/ |
| D | app.overlay | 73 #power-domain-cells = <0>;
80 #power-domain-cells = <0>;
86 #power-domain-cells = <0>;
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| /Zephyr-latest/boards/raytac/mdbt53_db_40/ |
| D | Kconfig | 12 The board which will be used for CPUNET domain when creating a multi
25 The board which will be used for CPUAPP domain when creating a multi
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| /Zephyr-latest/boards/nordic/nrf5340_audio_dk/ |
| D | Kconfig | 12 The board which will be used for CPUNET domain when creating a multi
25 The board which will be used for CPUAPP domain when creating a multi
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| /Zephyr-latest/boards/nordic/nrf5340dk/ |
| D | Kconfig | 12 The board which will be used for CPUNET domain when creating a multi
24 The board which will be used for CPUAPP domain when creating a multi
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| /Zephyr-latest/boards/raytac/mdbt53v_db_40/ |
| D | Kconfig | 12 The board which will be used for CPUNET domain when creating a multi
25 The board which will be used for CPUAPP domain when creating a multi
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| /Zephyr-latest/drivers/bbram/ |
| D | Kconfig.stm32 | 14 application data. They are implemented in the backup domain that remains
17 reset by a backup domain reset.
|
