| /Zephyr-latest/drivers/serial/ |
| D | uart_cc13xx_cc26xx.c | 516 uint32_t domain, periph; \
520 domain = PRCM_DOMAIN_SERIAL; \
523 domain = PRCM_DOMAIN_PERIPH; \
526 PRCMPowerDomainOn(domain); \
539 while (PRCMPowerDomainsAllOn(domain) != \
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| /Zephyr-latest/drivers/clock_control/ |
| D | clock_control_r8a7795_cpg_mssr.c | 122 clk_info = rcar_cpg_find_clk_info_by_module_id(dev, clk->domain, clk->module); in r8a7795_cpg_core_clock_endisable()
157 if (clk->domain == CPG_MOD) { in r8a7795_cpg_mssr_start_stop()
164 } else if (clk->domain == CPG_CORE) { in r8a7795_cpg_mssr_start_stop()
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| /Zephyr-latest/arch/arc/core/mpu/ |
| D | arc_mpu_common_internal.h | 188 void arc_core_mpu_remove_mem_partition(struct k_mem_domain *domain, uint32_t part_id) in arc_core_mpu_remove_mem_partition() argument
190 ARG_UNUSED(domain); in arc_core_mpu_remove_mem_partition()
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| /Zephyr-latest/samples/boards/st/power_mgmt/serial_wakeup/boards/ |
| D | nucleo_h563zi.overlay | 8 /* Set domain clock to HSI to allow wakeup from Stop mode */
|
| D | b_u585i_iot02a.overlay | 16 /* Set domain clock to HSI to allow wakeup from Stop mode */
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| D | nucleo_wb55rg.overlay | 17 /* Set domain clock to HSI to allow wakeup from Stop mode */
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| /Zephyr-latest/dts/arm/st/h7/ |
| D | stm32h723.dtsi | 193 /* D1 domain, AXI SRAM (128KB with shared ITCM 192KB as `TCM_AXI_SHARED` is `000`) */
199 /* D2 domain, AHB SRAM */
206 /* D2 domain, AHB SRAM */
213 /* D3 domain, AHB SRAM */
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| /Zephyr-latest/subsys/logging/ |
| D | Kconfig.processing | 101 Arbitrary time between log message creation in the remote domain and
102 processing in the local domain. Higher value increases message processing
134 int "Cache slot size of domain name"
138 int "Number of entries in domain name cache"
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| /Zephyr-latest/scripts/west_commands/completion/ |
| D | west-completion.zsh | 236 '--sysbuild[create multi-domain build system]'
237 '--no-sysbuild[do not create multi-domain build system]'
240 '--domain[execute build tool (make or ninja) for a given domain]:domain:'
288 '--domain[execute build tool (make or ninja) for a given domain]:domain:'
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| /Zephyr-latest/subsys/llext/ |
| D | llext_mem.c | 287 int llext_add_domain(struct llext *ext, struct k_mem_domain *domain) in llext_add_domain() argument
296 ret = k_mem_domain_add_partition(domain, &ext->mem_parts[i]); in llext_add_domain()
299 i, domain); in llext_add_domain()
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| /Zephyr-latest/arch/arm64/core/cortex_r/ |
| D | arm_mpu.c | 758 static int configure_domain_partitions(struct k_mem_domain *domain) in configure_domain_partitions() argument
763 SYS_DLIST_FOR_EACH_CONTAINER(&domain->mem_domain_q, thread, in configure_domain_partitions()
778 int arch_mem_domain_partition_add(struct k_mem_domain *domain, uint32_t partition_id) in arch_mem_domain_partition_add() argument
782 return configure_domain_partitions(domain); in arch_mem_domain_partition_add()
785 int arch_mem_domain_partition_remove(struct k_mem_domain *domain, uint32_t partition_id) in arch_mem_domain_partition_remove() argument
789 return configure_domain_partitions(domain); in arch_mem_domain_partition_remove()
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| /Zephyr-latest/tests/kernel/mem_protect/mem_protect/src/ |
| D | mem_domain.c | 94 struct k_mem_domain *domain, bool should_fault) in spawn_child_thread() argument
102 if (domain != NULL) { in spawn_child_thread()
103 k_mem_domain_add_thread(domain, &child_thread); in spawn_child_thread()
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| /Zephyr-latest/subsys/net/lib/ptp/ |
| D | ds.h | 44 uint8_t domain; member
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| /Zephyr-latest/tests/net/socket/misc/src/ |
| D | main.c | 932 int domain; in ZTEST() local
939 ret = zsock_getsockopt(sock_t, SOL_SOCKET, SO_DOMAIN, &domain, &optlen); in ZTEST()
941 zassert_equal(domain, AF_INET, "Mismatch domain value %d vs %d", in ZTEST()
942 AF_INET, domain); in ZTEST()
944 ret = zsock_getsockopt(sock_u, SOL_SOCKET, SO_DOMAIN, &domain, &optlen); in ZTEST()
946 zassert_equal(domain, AF_INET6, "Mismatch domain value %d vs %d", in ZTEST()
947 AF_INET6, domain); in ZTEST()
950 domain = AF_INET; in ZTEST()
951 ret = zsock_setsockopt(sock_u, SOL_SOCKET, SO_DOMAIN, &domain, optlen); in ZTEST()
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| /Zephyr-latest/drivers/xen/ |
| D | Kconfig | 30 configured for domain in Xen hypervisor.
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| /Zephyr-latest/arch/arm64/core/xen/ |
| D | Kconfig | 20 Built binary will be used as Xen privileged domain (Domain 0).
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| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
| D | f0_i2c1_hsi.overlay | 73 /* Basic test only. Don't configure domain clock. */
|
| D | f3_i2c1_hsi.overlay | 73 /* Basic test only. Don't configure domain clock. */
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| D | g0_i2c1_sysclk_lptim1_lsi.overlay | 80 /* Basic test only. ADC1 domain clock is set by the board DTS : SYSCLK */
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| D | wb_i2c1_hsi_lptim1_lse.overlay | 86 /* Basic test only. Don't configure domain clock. */
|
| D | wb_i2c1_sysclk_lptim1_lsi.overlay | 80 /* Basic test only. Don't configure domain clock. */
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| /Zephyr-latest/soc/st/stm32/stm32u5x/ |
| D | Kconfig | 29 All clocks in the core domain are stopped.
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| /Zephyr-latest/boards/panasonic/panb511evb/ |
| D | panb511evb_nrf54l15_common.dtsi | 38 * PWM signal can be exposed on GPIO pin only within same domain.
39 * There is only one domain which contains both PWM and GPIO:
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| /Zephyr-latest/samples/boards/nordic/clock_skew/ |
| D | README.rst | 12 LFCLK domain to durations in the HFCLK domain.
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| /Zephyr-latest/doc/kernel/usermode/ |
| D | overview.rst | 45 that are not members of the same memory domain.
52 threads in the same memory domain, depending on hardware.
57 memory domain. Portable code should not assume this.
109 - We can't protect against mistakes made in memory domain configuration done in
139 granted by a supervisor thread using the memory domain APIs. Newly created
140 threads inherit the memory domain configuration of the parent. Threads may
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