Searched refs:default (Results 5151 – 5175 of 5614) sorted by relevance
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| /Zephyr-latest/boards/sparkfun/pro_micro_rp2040/doc/ |
| D | index.rst | 121 By default, building an app for this board will generate a
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| /Zephyr-latest/boards/shields/x_nucleo_iks01a2/doc/ |
| D | index.rst | 15 and it is possible to change the default I2C port.
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| /Zephyr-latest/boards/shields/x_nucleo_iks01a3/doc/ |
| D | index.rst | 15 and it is possible to change the default I2C port.
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| /Zephyr-latest/boards/silabs/radio_boards/slwrb4161a/doc/ |
| D | index.rst | 60 The default configuration can be found in
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| /Zephyr-latest/boards/silabs/radio_boards/slwrb4170a/doc/ |
| D | index.rst | 60 The default configuration can be found in
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| /Zephyr-latest/boards/gd/gd32e507v_start/doc/ |
| D | index.rst | 65 The GD32E507V-START board has one serial communication port. The default port
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| /Zephyr-latest/boards/gd/gd32f350r_eval/doc/ |
| D | index.rst | 65 The GD32F350R-EVAL board has one serial communication port. The default port
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| /Zephyr-latest/boards/gd/gd32f450v_start/doc/ |
| D | index.rst | 66 provides default configuration for USART0 with TX connected at PB6 and RX at
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| /Zephyr-latest/boards/gd/gd32l233r_eval/doc/ |
| D | index.rst | 70 The GD32L233R-EVAL board has one serial communication port. The default port
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| /Zephyr-latest/boards/gd/gd32vf103v_eval/doc/ |
| D | index.rst | 70 The GD32VF103V-EVAL board has two serial communications port. The default port
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| /Zephyr-latest/samples/boards/arc_secure_services/ |
| D | README.rst | 24 * By default, all the peripheral space is normal mode accessible, i.e.,
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| /Zephyr-latest/samples/net/sockets/http_get/ |
| D | README.rst | 64 directory. The certificate was selected to enable access to the default website
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| /Zephyr-latest/boards/adafruit/feather_stm32f405/doc/ |
| D | index.rst | 89 DFU-Util programming is supported through Zephyr by default. Set up
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| /Zephyr-latest/boards/native/native_posix/doc/ |
| D | index.rst | 85 The 32 bit version, ``native_posix``, is the default target, which will compile
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| /Zephyr-latest/boards/native/nrf_bsim/doc/ |
| D | nrf54l15bsim.rst | 95 As entropy driver, the :dtcompatible:`zephyr,native-posix-rng` is enabled by default.
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| /Zephyr-latest/samples/bluetooth/direction_finding_connectionless_tx/ |
| D | README.rst | 26 By default the application supports Angle of Arrival (AoA) and Angle of
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| /Zephyr-latest/doc/services/shell/ |
| D | index.rst | 38 but many can be disabled when not needed. To default to options which
72 By default the telnet client won't handle telnet commands and configuration. Although
547 * :command:`default` - Shell will send terminal width = 80 to the
684 default:
701 default:
768 backend and the Log RTT backend does not work by default, because both default
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| /Zephyr-latest/scripts/ci/ |
| D | check_compliance.py | 1774 parser.add_argument('-c', '--commits', default=default_range,
1777 parser.add_argument('-o', '--output', default="compliance.xml",
1787 parser.add_argument('-m', '--module', action="append", default=[],
1790 parser.add_argument('-e', '--exclude-module', action="append", default=[],
1793 parser.add_argument('-j', '--previous-run', default=None,
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| /Zephyr-latest/doc/kernel/usermode/ |
| D | memory_domain.rst | 26 MPUs have the concept of a default memory access policy map, which can be
90 This behavior is enabled by default if supported and can be selectively
175 default domain ``k_mem_domain_default`` which will be assigned to threads if
178 member of the default domain.
408 default domain), it will be removed from it in favor of the new one.
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| /Zephyr-latest/doc/connectivity/networking/ |
| D | net-stack-architecture.rst | 92 :ref:`k_fifo <fifos_v2>`). By default there is only one receive queue in
147 queue (implemented by :ref:`k_fifo <fifos_v2>`). By default there is only
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| /Zephyr-latest/boards/st/b_l072z_lrwan1/doc/ |
| D | index.rst | 142 The default configuration can be found in the defconfig file:
181 the USB data lines are not connected to the MCU by default. To connect
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| /Zephyr-latest/boards/st/b_l4s5i_iot01a/doc/ |
| D | index.rst | 129 The default configuration can be found in the defconfig file:
160 as well as the main PLL clock. By default the System clock is driven by the PLL clock at 80MHz,
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| /Zephyr-latest/boards/st/nucleo_g431rb/doc/ |
| D | index.rst | 120 The default configuration can be found in the defconfig file:
164 as well as main PLL clock. By default System clock is driven by PLL clock at 150MHz,
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| /Zephyr-latest/boards/st/nucleo_g474re/doc/ |
| D | index.rst | 130 The default configuration can be found in the defconfig file:
178 as well as main PLL clock. By default System clock is driven by PLL clock at 150MHz,
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| /Zephyr-latest/boards/st/nucleo_h723zg/doc/ |
| D | index.rst | 118 The default configuration can be found in the defconfig files:
142 oscillator, as well as the main PLL clock. By default, the System clock is
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