Searched refs:default (Results 4701 – 4725 of 5614) sorted by relevance
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| /Zephyr-latest/subsys/storage/stream/ |
| D | Kconfig | 17 default y
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| /Zephyr-latest/scripts/kconfig/ |
| D | kconfiglib.py | 3581 default = (d[0], self._make_and(sym.direct_dep, d[1]))
3582 sym.defaults.insert(inserted + idx, default)
3692 cur.defaults = [(default, self._make_and(cond, dep))
3693 for default, cond in cur.defaults]
3800 for default, _ in sym.defaults:
3801 if default.__class__ is not Symbol:
3806 sym.name_and_loc, expr_str(default)))
3809 if not default.is_constant and not default.nodes and \
3810 not default.name.isupper():
3819 elif not num_ok(default, sym.orig_type): # INT/HEX
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| /Zephyr-latest/doc/releases/ |
| D | migration-guide-3.5.rst | 37 * The default C library used on most targets has changed from the built-in
50 the default heap size depends on which C library is in use. When using the
51 minimal C library, the default heap is zero bytes, which means that malloc
52 will always fail. When using Picolibc, the default is 16kB with
56 other targets, the default heap uses all remaining memory on the system.
83 * Picolibc's default floating point input/output code is larger than the
95 The following modules have been made optional and are not downloaded with `west update` by default …
220 * The LPC55XXX series SOC (except LPC55S06) default main clock has been
280 * The :kconfig:option:`CONFIG_BOOTLOADER_SRAM_SIZE` default value is now ``0`` (was
298 During system startup a default name is assigned to the network interface like
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| /Zephyr-latest/boards/seeed/xiao_rp2040/doc/ |
| D | index.rst | 100 The board uses a standard XIAO pinout, the default pin mapping is the following:
118 By default, building an app for this board will generate a
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| /Zephyr-latest/cmake/sca/codechecker/ |
| D | sca.cmake | 81 --name ${CODECHECKER_NAME} # Set a default metadata name
110 # issues were detected. Suppress the exit status by default, but permit opting
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| /Zephyr-latest/doc/hardware/porting/ |
| D | board_porting.rst | 295 :ref:`kconfig` formats. This provides default settings for software features
332 default: <default-revision-value>
465 generic across K6X-based boards, it leaves many devices disabled by default
557 only modifies the default value of said setting, then
561 Board-specific default values for Kconfig options.
573 default y
577 default y
635 and their drivers disabled by default.
653 by default configure and use the UART controller connected to that adapter.
660 CDC ACM UART as the default backend for logging and shell.
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| D | shields.rst | 31 used for default shield configuration. To ease use with applications,
32 the default shield configuration here should be consistent with those in
35 * **Kconfig.defconfig**: This file defines the default shield configuration. It
119 Alternatively, it could be set by default in a project's CMakeLists.txt:
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| /Zephyr-latest/soc/intel/intel_adsp/common/ |
| D | CMakeLists.txt | 135 # If some of your board(s) need to override default rimage parameters
142 # other ways to override default rimage parameters check
147 # rimage.extra-args`! Avoid overriding default rimage parameters in
|
| /Zephyr-latest/cmake/compiler/arcmwdt/ |
| D | compiler_flags.cmake | 82 -Wswitch-default
189 # but it has PIE disabled by default - so no extra flags are required here.
202 # We rely on the default C/C++ include locations which are provided by MWDT if we do build with
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| /Zephyr-latest/doc/services/pm/ |
| D | power_domain.rst | 115 /* turn off the domain (e.g. reset control pins to default state) */
118 default:
170 default:
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| /Zephyr-latest/boards/st/nucleo_g431kb/doc/ |
| D | index.rst | 54 The default configuration can be found in the defconfig file:
82 as well as main PLL clock. By default the external oscillator is not connected to the board. Theref…
83 High Speed oscillator is supported. By default System clock is driven by PLL clock at 170 MHz,
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| /Zephyr-latest/boards/st/stm32h735g_disco/doc/ |
| D | index.rst | 66 | | | default. Solder bridges SB29 and |
75 The default configuration can be found in the defconfig file:
96 as well as by the main PLL clock. By default, the System clock
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| /Zephyr-latest/boards/fanke/fk7b0m1_vbt6/doc/ |
| D | index.rst | 87 The default configuration per core can be found in
119 as well as by the main PLL clock. By default the system clock is driven by the PLL clock at 280MHz,
125 The Zephyr console output is assigned to UART1. The default communication settings are 115200 8N1.
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| /Zephyr-latest/boards/others/black_f407zg_pro/doc/ |
| D | index.rst | 106 Zephyr default configuration uses CAN_2 exclusively, as
111 The default configuration can be found in
150 as well as main PLL clock. By default System clock is driven by PLL clock
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| /Zephyr-latest/boards/nxp/rddrone_fmuk66/doc/ |
| D | index.rst | 80 The default configuration can be found in
115 configured by default to use jlink. The board package
118 default configuration for programming and getting a console.
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| /Zephyr-latest/boards/seeed/lora_e5_mini/doc/ |
| D | index.rst | 39 - Delivered with SMA antenna (per default IPEX connector is disconnected)
96 The default configuration can be found in:
130 main PLL clock. By default System clock is driven by the MSI clock at 48MHz.
177 Per default the console on ``usart1`` is available on the USB Type C connector
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| /Zephyr-latest/cmake/compiler/gcc/ |
| D | compiler_flags.cmake | 73 -Wswitch-default
88 -Wswitch-default
132 # "volatile" usage generates warnings by default in standard versions
217 # GCC 11 by default emits DWARF version 5 which cannot be parsed by
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| /Zephyr-latest/boards/m5stack/m5stack_core2/doc/ |
| D | index.rst | 99 Note: This fixed regulator supply is disabled by default.
184 The baud rate of 921600bps is set by default. If experiencing issues when flashing,
211 - `ESP32-PICO-D4 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32-pico-…
213 - `ESP32 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32_datasheet_en.…
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| /Zephyr-latest/boards/nxp/frdm_kl25z/doc/ |
| D | index.rst | 58 The default configuration can be found in
118 configured by default to use the :ref:`opensda-daplink-onboard-debug-probe`.
132 Linkserver is the default for this board, ``west flash`` and ``west debug`` will
151 default runner from pyOCD to J-Link:
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| /Zephyr-latest/boards/nxp/twr_ke18f/doc/ |
| D | index.rst | 82 The default configuration can be found in the defconfig file:
102 The TWR-KE18F board by default only supports polling the FXOS8700
134 configured by default to use the :ref:`opensda-daplink-onboard-debug-probe`.
160 default runner from pyOCD to J-Link:
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| /Zephyr-latest/scripts/west_commands/ |
| D | build.py | 139 group.add_argument('-o', '--build-opt', default=[], action='append',
146 action='append', default=[],
153 action='append', default=[],
160 action='append', default=[],
167 metavar='EXTRA_DTC_OVERLAY_FILE', action='append', default=[],
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| /Zephyr-latest/doc/connectivity/networking/ |
| D | overview.rst | 18 * **IPv6** The support for IPv6 is enabled by default. Various IPv6 sub-options
31 (`RFC 4861 <https://tools.ietf.org/html/rfc4861>`_) is enabled by default.
33 (`RFC 3810 <https://tools.ietf.org/html/rfc3810>`_) is enabled by default.
39 only IPv6. IPv4 can be used in Ethernet based networks. By default
45 are supported by default.
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| /Zephyr-latest/boards/st/nucleo_h755zi_q/doc/ |
| D | index.rst | 109 The default configuration per core can be found in the defconfig files:
132 oscillator, as well as the main PLL clock. By default, the System clock is
182 By default:
187 Also, default out of the box board configuration enables CM7 and CM4 boot when
190 Zephyr flash configuration has been set to meet these default settings.
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| /Zephyr-latest/boards/st/stm32h745i_disco/doc/ |
| D | index.rst | 97 The default configuration per core can be found in the defconfig files:
119 oscillator, as well as the main PLL clock. By default, the System clock is
176 By default:
181 Also, the out of the box default board configuration enables CM7 and CM4 boot when
184 Zephyr flash configuration has been set to meet these default settings.
|
| /Zephyr-latest/samples/net/sockets/echo_client/ |
| D | README.rst | 40 Note, that by default IEEE 802.15.4 L2 uses unacknowledged communication. To
105 ``src`` directory. The default certificates used by Socket Echo Client and
116 By default, to make the testing easier, the proxy is expected to run on the
121 with the default port:
298 Go to ``Form`` and leave default values - e.g:
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