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/Zephyr-latest/boards/bbc/microbit_v2/
Dbbc_microbit_v2_defconfig6 # clock control
/Zephyr-latest/boards/renesas/mck_ra8t1/doc/
Dindex.rst6 The **MCK-RA8T1** is a development kit that enables easy evaluation of motor control using permanen…
24 **MCB-RA8T1** is a CPU board for motor control equipped with RA8T1. Motor control using RA8T1 can b…
27 … communication board, the CPU board can be electrically isolated from the PC for safe motor control
136 …icroprocessors/ra-cortex-m-mcus/ra8t1-480-mhz-arm-cortex-m85-based-motor-control-microcontroller-h…
148 …ors/ra-cortex-m-mcus/rtk0ema5k0s00020bj-mck-ra8t1-renesas-flexible-motor-control-kit-ra8t1-mcu-gro…
154 …ent/fet-motor-drivers/rtk0em0000s04020bj-mci-lv-1-renesas-flexible-motor-control-inverter-board-lo…
157 …ormance-efficiency-mcus/rtk0emxc90s00000bj-mc-com-renesas-flexible-motor-control-communication-boa…
/Zephyr-latest/arch/arm64/
DKconfig28 When this option is selected, the architecture interrupt control
29 functions are mapped to the SoC interrupt control interface, which is
/Zephyr-latest/boards/shields/x_nucleo_bnrg2a1/
DKconfig.defconfig11 # Disable Flow control
/Zephyr-latest/samples/net/cellular_modem/boards/
Dnrf9160dk_nrf52840.overlay11 hw-flow-control;
/Zephyr-latest/samples/drivers/clock_control_xec/
DREADME.rst3 Microchip XEC (MEC15xx/MEC172x) clock control driver sample application
11 hardware configuration and exercises some clock control
67 clock control.
/Zephyr-latest/dts/riscv/sifive/
Driscv64-fu740.dtsi177 reg-names = "control";
186 reg-names = "control";
195 reg-names = "control", "mem";
206 reg-names = "control";
217 reg-names = "control";
/Zephyr-latest/tests/bluetooth/shell/boards/
Dmimxrt1060_evk_mimxrt1062_qspi.overlay16 hw-flow-control;
Dmimxrt1060_evk_mimxrt1062_qspi_C.overlay16 hw-flow-control;
/Zephyr-latest/tests/bluetooth/tester/boards/
Dpanb511evb_nrf54l15_cpuapp.overlay17 hw-flow-control;
/Zephyr-latest/samples/bluetooth/hci_uart/boards/
Dnrf9160dk_nrf52840.overlay13 hw-flow-control;
/Zephyr-latest/drivers/sensor/maxim/max30101/
DKconfig48 prompt "Mode control"
71 int "ADC range control"
82 int "ADC sample rate control"
104 Set the pulse amplitude to control the LED1 (red) current. The actual
118 Set the pulse amplitude to control the LED2 (IR) current. The actual
132 Set the pulse amplitude to control the LED3 (green) current. The
/Zephyr-latest/samples/drivers/clock_control_litex/
DREADME.rst1 .. zephyr:code-sample:: clock-control-litex
2 :name: LiteX clock control driver
5 Use LiteX clock control driver to generate multiple clock signals.
10 This sample is providing an overview of LiteX clock control driver capabilities.
21 …e driver, including default settings for clock outputs, is held in Device Tree clock control nodes.
118 clock control device is 0x40013460, name is clock0
/Zephyr-latest/boards/shields/x_nucleo_idb05a1/
DKconfig.defconfig10 # Disable Flow control
/Zephyr-latest/boards/renesas/rcar_spider_s4/
Drcar_spider_s4_r8a779f0_a55_defconfig12 # Enable clock control
/Zephyr-latest/drivers/clock_control/
DKconfig.fixed1 # Fixed clock control driver config
DKconfig.gd325 bool "GD32 clock control"
DKconfig.sam5 bool "Atmel SAM clock control"
DKconfig.max329 Enable clock control support for Analog Devices MAX32xxx/MAX78xxx SoC series.
/Zephyr-latest/tests/subsys/ipc/ipc_sessions/remote/boards/
Dnrf54h20dk_nrf54h20_cpurad.overlay7 /delete-property/ hw-flow-control;
/Zephyr-latest/drivers/flash/
DKconfig.stm3235 bool "Extended operation for flash write protection control"
52 bool "Extended operation for flash readout protection control"
79 bool "Extended operation for blocking option and control registers"
84 to option and control registers until reset. Disabling access to these
/Zephyr-latest/boards/infineon/cyw920829m2evk_02/
Dcyw920829m2evk_02-pinctrl.dtsi6 /* Configure pin control bias mode for uart2 pins */
/Zephyr-latest/subsys/usb/device_next/class/
Dusbd_msc_scsi.c52 #define GET_CONTROL_NACA(cmd) (cmd->control & BIT(2))
81 uint8_t control; in SCSI_CMD_STRUCT() local
93 uint8_t control; in SCSI_CMD_STRUCT() local
152 uint8_t control; in SCSI_CMD_STRUCT() local
182 uint8_t control; in SCSI_CMD_STRUCT() local
218 uint8_t control; in SCSI_CMD_STRUCT() local
236 uint8_t control; in SCSI_CMD_STRUCT() local
248 uint8_t control; in SCSI_CMD_STRUCT() local
278 uint8_t control; in SCSI_CMD_STRUCT() local
292 uint8_t control; in SCSI_CMD_STRUCT() local
[all …]
/Zephyr-latest/doc/connectivity/canbus/
Disotp.rst22 Additionally, it adds a flow control mechanism to influence the sender's
28 single-frames (SF). They don't need to fragment and do not have any flow-control.
33 The receiving peer sends back a flow-control-frame (FC) to either deny,
/Zephyr-latest/drivers/stepper/
DKconfig.gpio6 bool "Activate driver for gpio stepper control"

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