Home
last modified time | relevance | path

Searched refs:channel (Results 701 – 725 of 1368) sorted by relevance

1...<<21222324252627282930>>...55

/Zephyr-latest/tests/drivers/adc/adc_accuracy_test/boards/
Dek_ra6m1.overlay20 channel@0 {
Dek_ra6m5.overlay20 channel@0 {
Dek_ra8d1.overlay20 channel@0 {
Dfpb_ra6e1.overlay20 channel@0 {
Dfpb_ra6e2.overlay20 channel@0 {
/Zephyr-latest/tests/drivers/adc/adc_api/boards/
Dfrdm_kl25z.overlay18 channel@c {
Dsam4s_xplained.overlay18 channel@f {
Dtlsr9518adk80d.overlay18 channel@0 {
Dfrdm_k22f.overlay18 channel@e {
/Zephyr-latest/drivers/led/
Dlp5562.c114 #define LP5562_CHANNEL_MASK(channel) ((LP5562_MASK) << (channel << 1)) argument
191 static int lp5562_get_pwm_reg(enum lp5562_led_channels channel, uint8_t *reg) in lp5562_get_pwm_reg() argument
193 switch (channel) { in lp5562_get_pwm_reg()
323 enum lp5562_led_channels channel, in lp5562_set_led_source() argument
329 LP5562_CHANNEL_MASK(channel), in lp5562_set_led_source()
330 source << (channel << 1))) { in lp5562_set_led_source()
349 enum lp5562_led_channels channel, in lp5562_get_led_source() argument
359 *source = (led_map >> (channel << 1)) & LP5562_MASK; in lp5562_get_led_source()
DKconfig.lp556212 LP5562 LED driver has 4 channels (RGBW). Each channel can drive up to
DKconfig.lp556911 Each channel can drive up to 25.5 mA per LED.
/Zephyr-latest/drivers/disk/
Dsdmmc_stm32.c60 uint32_t channel; member
188 uint32_t channel, int status) in stm32_sdmmc_dma_cb() argument
193 LOG_ERR("DMA callback error with channel %d.", channel); in stm32_sdmmc_dma_cb()
211 ret = dma_config(dma->dev, dma->channel, &dma->cfg); in stm32_sdmmc_configure_dma()
264 ret = dma_stop(dma_tx->dev, dma_tx->channel); in stm32_sdmmc_dma_deinit()
270 ret = dma_stop(dma_rx->dev, dma_rx->channel); in stm32_sdmmc_dma_deinit()
752 .channel = DT_INST_DMAS_CELL_BY_NAME(0, dir, channel), \
754 DT_DRV_INST(0), dir, channel), \
/Zephyr-latest/dts/arm/nxp/
Dnxp_k6x.dtsi55 io-channel-names = "SENSOR", "BANDGAP";
66 io-channel-names = "SENSOR", "BANDGAP";
434 #io-channel-cells = <1>;
447 #io-channel-cells = <1>;
456 #io-channel-cells = <1>;
465 #io-channel-cells = <1>;
551 compatible = "nxp,pit-channel";
558 compatible = "nxp,pit-channel";
565 compatible = "nxp,pit-channel";
572 compatible = "nxp,pit-channel";
/Zephyr-latest/drivers/i2s/
Di2s_sam_ssc.c165 static int reload_dma(const struct device *dev_dma, uint32_t channel, in reload_dma() argument
170 ret = dma_reload(dev_dma, channel, (uint32_t)src, (uint32_t)dst, size); in reload_dma()
175 ret = dma_start(dev_dma, channel); in reload_dma()
180 static int start_dma(const struct device *dev_dma, uint32_t channel, in start_dma() argument
194 ret = dma_config(dev_dma, channel, cfg); in start_dma()
199 ret = dma_start(dev_dma, channel); in start_dma()
206 uint32_t channel, int status) in dma_rx_callback() argument
208 const struct device *dev = get_dev_from_dma_channel(channel); in dma_rx_callback()
266 uint32_t channel, int status) in dma_tx_callback() argument
268 const struct device *dev = get_dev_from_dma_channel(channel); in dma_tx_callback()
[all …]
/Zephyr-latest/drivers/spi/
Dspi_andes_atcspi200.c25 uint32_t channel; member
254 uint32_t channel, int status) in dma_rx_callback() argument
261 dma_stop(data->dma_rx.dma_dev, data->dma_rx.channel); in dma_rx_callback()
269 error = dma_start(data->dma_rx.dma_dev, data->dma_rx.channel); in dma_rx_callback()
275 uint32_t channel, int status) in dma_tx_callback() argument
282 dma_stop(data->dma_tx.dma_dev, data->dma_tx.channel); in dma_tx_callback()
290 error = dma_start(data->dma_tx.dma_dev, data->dma_tx.channel); in dma_tx_callback()
407 ret = dma_config(data->dma_tx.dma_dev, data->dma_tx.channel, in spi_dma_tx_load()
520 ret = dma_config(data->dma_rx.dma_dev, data->dma_rx.channel, in spi_dma_rx_load()
582 error = dma_start(data->dma_rx.dma_dev, data->dma_rx.channel); in spi_transfer_dma()
[all …]
/Zephyr-latest/drivers/dma/
Ddma_iproc_pax_v2.c995 static int dma_iproc_pax_configure(const struct device *dev, uint32_t channel, in dma_iproc_pax_configure() argument
1002 if (channel >= PAX_DMA_RINGS_MAX) { in dma_iproc_pax_configure()
1003 LOG_ERR("Invalid ring/channel %d\n", channel); in dma_iproc_pax_configure()
1007 ring = &(pd->ring[channel]); in dma_iproc_pax_configure()
1023 ret = dma_iproc_pax_process_dma_blocks(dev, channel, cfg); in dma_iproc_pax_configure()
1038 uint32_t channel) in dma_iproc_pax_transfer_start() argument
1044 if (channel >= PAX_DMA_RINGS_MAX) { in dma_iproc_pax_transfer_start()
1045 LOG_ERR("Invalid ring %d\n", channel); in dma_iproc_pax_transfer_start()
1049 ring = &(pd->ring[channel]); in dma_iproc_pax_transfer_start()
1050 set_pkt_count(dev, channel, ring->total_pkt_count); in dma_iproc_pax_transfer_start()
[all …]
/Zephyr-latest/subsys/logging/mipi_syst/
Dplatform.h30 mipi_syst_u16 channel; member
64 mipi_syst_u32 channel; member
/Zephyr-latest/soc/nordic/nrf53/
DKconfig.sync_rtc34 int "IPM channel from APP to NET"
40 int "IPM channel from APP to NET"
/Zephyr-latest/samples/subsys/mgmt/osdp/
DREADME.rst13 communication channel. Nevertheless, this protocol can be used to transfer
14 secure data over any stream based physical channel. Read more about `OSDP here
/Zephyr-latest/boards/phytec/reel_board/
Dreel_board-pinctrl.dtsi28 /* invert channel 0 (part of group1 configuration) */
/Zephyr-latest/drivers/serial/
DKconfig.hostlink13 This option enables access to HOSTLINK channel as UART device.
/Zephyr-latest/drivers/input/
DKconfig.xpt204611 This driver is very similar to ADS7843, but differs on channel numbering.
/Zephyr-latest/boards/shields/mikroe_adc_click/boards/
Dlpcxpresso55s16.overlay19 #io-channel-cells = <1>;
/Zephyr-latest/samples/drivers/adc/adc_dt/boards/
Dcc1352r1_launchxl.overlay20 channel@5 {

1...<<21222324252627282930>>...55