| /Zephyr-latest/samples/drivers/adc/adc_dt/boards/ |
| D | frdm_mcxn947_mcxn947_cpu0.overlay | 12 /* adjust channel number according to pinmux in board.dts */
30 channel@0 {
41 channel@1 {
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| D | frdm_mcxn947_mcxn947_cpu0_qspi.overlay | 12 /* adjust channel number according to pinmux in board.dts */
30 channel@0 {
41 channel@1 {
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| D | mimxrt595_evk_mimxrt595s_cm33.overlay | 12 /* adjust channel number according to pinmux in board.dts */
30 channel@0 {
41 channel@1 {
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| D | mimxrt1160_evk_mimxrt1166_cm7.overlay | 11 /* adjust channel number according to pinmux in board.dts */
25 channel@0 {
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| D | mimxrt1170_evk_mimxrt1176_cm7_B.overlay | 11 /* adjust channel number according to pinmux in board.dts */
25 channel@0 {
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| /Zephyr-latest/subsys/logging/ |
| D | log_output_syst.c | 30 static mipi_syst_u16 channel = 1; variable
208 p->channel = 0; in stp_write_version()
223 mipi_syst_u16 channel) in stp_write_setMC() argument
237 p->channel = 0; in stp_write_setMC()
240 if (p->channel != channel) { in stp_write_setMC()
243 stp_write_payload16(systh, p, channel); in stp_write_setMC()
245 p->channel = channel; in stp_write_setMC()
328 systh->systh_platform.channel);
351 systh->systh_platform.channel);
367 systh->systh_platform.channel);
[all …]
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| /Zephyr-latest/drivers/spi/ |
| D | spi_renesas_ra.c | 667 #define _ELC_EVENT_SPI_RXI(channel) ELC_EVENT_SPI##channel##_RXI argument
668 #define _ELC_EVENT_SPI_TXI(channel) ELC_EVENT_SPI##channel##_TXI argument
669 #define _ELC_EVENT_SPI_TEI(channel) ELC_EVENT_SPI##channel##_TEI argument
670 #define _ELC_EVENT_SPI_ERI(channel) ELC_EVENT_SPI##channel##_ERI argument
672 #define ELC_EVENT_SPI_RXI(channel) _ELC_EVENT_SPI_RXI(channel) argument
673 #define ELC_EVENT_SPI_TXI(channel) _ELC_EVENT_SPI_TXI(channel) argument
674 #define ELC_EVENT_SPI_TEI(channel) _ELC_EVENT_SPI_TEI(channel) argument
675 #define ELC_EVENT_SPI_ERI(channel) _ELC_EVENT_SPI_ERI(channel) argument
684 ELC_EVENT_SPI_RXI(DT_INST_PROP(index, channel)); \
686 ELC_EVENT_SPI_TXI(DT_INST_PROP(index, channel)); \
[all …]
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| /Zephyr-latest/samples/sensor/lsm303dlhc/src/ |
| D | main.c | 14 enum sensor_channel channel) in read_sensor() argument
25 ret = sensor_channel_get(sensor, channel, val); in read_sensor()
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| /Zephyr-latest/tests/bsim/bluetooth/host/gatt/ccc_store/src/ |
| D | common.h | 55 void backchannel_sync_send(uint channel, uint device_nbr);
56 void backchannel_sync_wait(uint channel, uint device_nbr);
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| /Zephyr-latest/tests/bsim/bluetooth/host/security/ccc_update/src/ |
| D | common.h | 55 void backchannel_sync_send(uint channel, uint device_nbr);
56 void backchannel_sync_wait(uint channel, uint device_nbr);
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| /Zephyr-latest/drivers/dma/ |
| D | dma_dw_common.h | 273 int dw_dma_config(const struct device *dev, uint32_t channel,
276 int dw_dma_reload(const struct device *dev, uint32_t channel,
279 int dw_dma_start(const struct device *dev, uint32_t channel);
281 int dw_dma_stop(const struct device *dev, uint32_t channel);
283 int dw_dma_suspend(const struct device *dev, uint32_t channel);
285 int dw_dma_resume(const struct device *dev, uint32_t channel);
289 int dw_dma_get_status(const struct device *dev, uint32_t channel,
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| /Zephyr-latest/drivers/mbox/ |
| D | mbox_nrf_vevif_task_rx.c | 42 uint8_t channel = *(uint8_t *)parameter; in vevif_task_rx_isr() local
43 uint8_t idx = channel - TASKS_IDX_MIN; in vevif_task_rx_isr()
45 nrf_vpr_csr_vevif_tasks_clear(BIT(channel)); in vevif_task_rx_isr()
48 cbs.cb[idx](DEVICE_DT_INST_GET(0), channel, cbs.user_data[idx], NULL); in vevif_task_rx_isr()
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| /Zephyr-latest/drivers/i2s/ |
| D | i2s_mcux_flexcomm.c | 36 uint32_t channel; /* stores the channel for dma */ member
343 LOG_DBG("Stopping DMA channel %u for TX stream", stream->channel); in i2s_mcux_tx_stream_disable()
344 dma_stop(stream->dev_dma, stream->channel); in i2s_mcux_tx_stream_disable()
384 LOG_DBG("Stopping DMA channel %u for RX stream", stream->channel); in i2s_mcux_rx_stream_disable()
385 dma_stop(stream->dev_dma, stream->channel); in i2s_mcux_rx_stream_disable()
446 dma_config(stream->dev_dma, stream->channel, &stream->dma_cfg); in i2s_mcux_config_dma_blocks()
468 uint32_t channel, int status) in i2s_mcux_dma_tx_callback() argument
483 LOG_ERR("no buffer in output queue for channel %u", channel); in i2s_mcux_dma_tx_callback()
505 dma_start(stream->dev_dma, stream->channel); in i2s_mcux_dma_tx_callback()
515 status, channel, ret); in i2s_mcux_dma_tx_callback()
[all …]
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| /Zephyr-latest/dts/arm/renesas/ra/ra6/ |
| D | r7fa6m2ax.dtsi | 27 channel = <5>;
41 channel = <6>;
55 channel = <7>;
62 channel = <2>;
68 channel-count = <13>;
69 channel-available-mask = <0x1f00ff>;
73 channel-count = <9>;
74 channel-available-mask = <0x700e7>;
80 channel = <RA_PWM_CHANNEL_13>;
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| /Zephyr-latest/drivers/dac/ |
| D | dac_mcux_lpdac.c | 63 static int mcux_lpdac_write_value(const struct device *dev, uint8_t channel, uint32_t value) in mcux_lpdac_write_value() argument
73 if (channel != 0) { in mcux_lpdac_write_value()
74 LOG_ERR("unsupported channel %d", channel); in mcux_lpdac_write_value()
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| /Zephyr-latest/tests/drivers/adc/adc_api/boards/ |
| D | lpcxpresso55s69_lpc55s69_cpu0.overlay | 23 channel@0 {
37 channel@1 {
51 channel@2 {
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| D | lpcxpresso55s69_lpc55s69_cpu0_ns.overlay | 23 channel@0 {
37 channel@1 {
51 channel@2 {
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| D | mimxrt1170_evk_mimxrt1176_cm7_A.overlay | 19 channel@0 {
28 channel@1 {
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| D | mimxrt595_evk_mimxrt595s_cm33.overlay | 19 channel@0 {
28 channel@1 {
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| D | mimxrt685_evk_mimxrt685s_cm33.overlay | 19 channel@0 {
28 channel@1 {
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| D | frdm_mcxn947_mcxn947_cpu0_qspi.overlay | 19 channel@0 {
28 channel@1 {
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| D | lpcxpresso55s28.overlay | 19 channel@0 {
28 channel@1 {
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| /Zephyr-latest/tests/drivers/dma/chan_blen_transfer/ |
| D | Kconfig | 9 int "first DMA channel to use"
13 int "second DMA channel to use"
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| /Zephyr-latest/drivers/pwm/ |
| D | pwm_pca9685.c | 166 uint32_t channel, uint32_t period_count, in pca9685_set_cycles() argument
178 if (channel >= CHANNEL_CNT) { in pca9685_set_cycles()
179 LOG_WRN("channel out of range: %u", channel); in pca9685_set_cycles()
207 buf[0] = ADDR_LED_ON_L(channel); in pca9685_set_cycles()
222 uint32_t channel, uint64_t *cycles) in pca9685_get_cycles_per_sec() argument
225 ARG_UNUSED(channel); in pca9685_get_cycles_per_sec()
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| D | pwm_sam0_tc.c | 65 uint32_t channel, uint64_t *cycles) in pwm_sam0_get_cycles_per_sec() argument
69 if (channel >= cfg->channels) { in pwm_sam0_get_cycles_per_sec()
78 static int pwm_sam0_set_cycles(const struct device *dev, uint32_t channel, uint32_t period_cycles, in pwm_sam0_set_cycles() argument
85 uint32_t invert_mask = 1 << channel; in pwm_sam0_set_cycles()
89 if (channel >= cfg->channels) { in pwm_sam0_set_cycles()
102 regs->COUNT8.CCBUF[channel].reg = TC_COUNT8_CCBUF_CCBUF(pulse_cycles); in pwm_sam0_set_cycles()
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