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/Zephyr-latest/drivers/dma/
Ddma_intel_adsp_hda_host_out.c31 .base = DT_INST_REG_ADDR(inst), \
/Zephyr-latest/boards/snps/nsim/arc_classic/support/
Dmdb_em11d.args62 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_em.props69 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_em11d.props70 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
/Zephyr-latest/kernel/include/
Dkernel_offsets.h57 GEN_OFFSET_SYM(_thread_t, base);
/Zephyr-latest/kernel/
Dipi.c54 executable_on_cpu = ((thread->base.cpu_mask & BIT(i)) != 0); in ipi_mask_create()
Dmsg_q.c143 (void)memcpy(pending_thread->base.swap_data, data, in z_impl_k_msgq_put()
172 arch_current_thread()->base.swap_data = (void *) data; in z_impl_k_msgq_put()
245 (void)memcpy(msgq->write_ptr, (char *)pending_thread->base.swap_data, in z_impl_k_msgq_get()
270 arch_current_thread()->base.swap_data = data; in z_impl_k_msgq_get()
Duserspace.c272 int base; in thread_idx_alloc() local
274 base = 0; in thread_idx_alloc()
279 *tidx = base + (idx - 1); in thread_idx_alloc()
293 base += 8; in thread_idx_alloc()
315 int base = tidx / NUM_BITS(_thread_idx_map[0]); in thread_idx_free() local
318 _thread_idx_map[base] |= BIT(offset); in thread_idx_free()
/Zephyr-latest/arch/riscv/core/
Dthread.c84 && (thread->base.user_options & K_USER)) { in arch_new_thread()
202 if ((thread->base.user_options & K_USER) != K_USER) { in arch_thread_priv_stack_space_get()
/Zephyr-latest/drivers/sensor/nuvoton/nuvoton_tach_npcx/
Dtach_nuvoton_npcx.c56 uintptr_t base; member
79 ((struct tach_reg *)((const struct tach_npcx_config *)(dev)->config)->base)
375 .base = DT_INST_REG_ADDR(inst), \
/Zephyr-latest/drivers/ps2/
Dps2_npcx_controller.c47 uintptr_t base; member
71 ((struct ps2_reg *)((const struct ps2_npcx_ctrl_config *)(dev)->config)->base)
321 .base = DT_INST_REG_ADDR(0),
/Zephyr-latest/arch/x86/
Dgen_idt.py114 base = 32 + (prio * 16)
115 return range(base, base + 16)
/Zephyr-latest/arch/arm/core/mpu/
Darm_mpu.c172 region_conf.base = new_region->start; in mpu_configure_region()
311 uint32_t base = mpu_region_get_base(i); in arm_core_mpu_mem_partition_config_update() local
313 if (base != partition->start) { in arm_core_mpu_mem_partition_config_update()
/Zephyr-latest/soc/nxp/s32/s32k3/
DKconfig35 The offset address from flash base address for ivt header
/Zephyr-latest/drivers/interrupt_controller/
Dintc_gicv3_priv.h115 #define IROUTER(base, n) (base + GIC_DIST_IROUTER + (n) * 8) argument
/Zephyr-latest/drivers/watchdog/
Dwdt_ambiq.c21 uint32_t base; member
185 .base = DT_INST_REG_ADDR(n), \
Dwdt_nxp_s32.c81 #define REG_READ(r) sys_read32(config->base + (r))
82 #define REG_WRITE(r, v) sys_write32((v), config->base + (r))
102 mem_addr_t base; member
377 .base = DT_INST_REG_ADDR(n), \
/Zephyr-latest/subsys/net/lib/shell/
Dping.c204 int base; in parse_arg() local
217 base = 16; in parse_arg()
219 base = 10; in parse_arg()
223 res = shell_strtol(str, base, &err); in parse_arg()
/Zephyr-latest/include/zephyr/bluetooth/audio/
Dbap.h1843 int bt_bap_base_get_size(const struct bt_bap_base *base);
1853 int bt_bap_base_get_pres_delay(const struct bt_bap_base *base);
1863 int bt_bap_base_get_subgroup_count(const struct bt_bap_base *base);
1874 int bt_bap_base_get_bis_indexes(const struct bt_bap_base *base, uint32_t *bis_indexes);
1887 int bt_bap_base_foreach_subgroup(const struct bt_bap_base *base,
2278 void (*base_recv)(struct bt_bap_broadcast_sink *sink, const struct bt_bap_base *base,
/Zephyr-latest/drivers/pwm/
Dpwm_nxp_s32_emios.c69 eMIOS_Type *base; member
282 if (config->base->CH.UC[channel].C & eMIOS_C_FEN_MASK) { in pwm_nxp_s32_capture_configure()
322 if (config->base->CH.UC[channel].C & eMIOS_C_FEN_MASK) { in pwm_nxp_s32_capture_enable()
372 bus_select = (config->base->CH.UC[channel].C & eMIOS_C_BSL_MASK) >> eMIOS_C_BSL_SHIFT; in pwm_nxp_s32_get_master_bus()
423 internal_prescaler = (config->base->CH.UC[master_bus].C2 & eMIOS_C2_UCEXTPRE_MASK) >> in pwm_nxp_s32_get_cycles_per_sec()
427 if (config->base->CH.UC[master_bus].C2 & eMIOS_C2_UCPRECLK_MASK) { in pwm_nxp_s32_get_cycles_per_sec()
430 global_prescaler = (config->base->MCR & eMIOS_MCR_GPRE_MASK) >> in pwm_nxp_s32_get_cycles_per_sec()
837 .base = (eMIOS_Type *)DT_REG_ADDR(DT_INST_PARENT(n)), \
/Zephyr-latest/drivers/usb/udc/
Dudc_dwc2.h45 struct usb_dwc2_reg *const base; member
/Zephyr-latest/soc/nxp/imx/imx6sx/
Dsoc_clk_freq.c13 uint32_t get_pwm_clock_freq(PWM_Type *base) in get_pwm_clock_freq() argument
/Zephyr-latest/arch/x86/zefi/
Defi.ld12 /* Pick a reasonable base address, EFI won't load us there anyway */
/Zephyr-latest/tests/drivers/gpio/gpio_ite_it8xxx2_v2/boards/
Dnative_sim.overlay38 wuc-base = <0xf01b20 0xf01b20 0xf01b20 0xf01b1c
/Zephyr-latest/arch/sparc/core/
Dthread.c51 if (thread->base.user_options & USER_FP_MASK) { in arch_new_thread()

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