Home
last modified time | relevance | path

Searched refs:base (Results 426 – 450 of 833) sorted by relevance

1...<<11121314151617181920>>...34

/Zephyr-latest/include/zephyr/drivers/ethernet/
Deth_nxp_enet_qos.h50 enet_qos_t *base; member
/Zephyr-latest/tests/subsys/testsuite/fff_fake_contexts/
DCMakeLists.txt13 project(base) project
/Zephyr-latest/subsys/shell/modules/kernel_service/thread/
Dpin.c42 thread->base.cpu_mask); in cmd_kernel_thread_pin()
/Zephyr-latest/drivers/adc/
Diadc_gecko.c45 IADC_TypeDef *base; member
55 IADC_TypeDef *iadc = (IADC_TypeDef *)config->base; in adc_gecko_set_config()
172 IADC_TypeDef *iadc = (IADC_TypeDef *)config->base; in adc_gecko_start_channel()
214 IADC_TypeDef *iadc = config->base; in adc_gecko_isr()
470 .base = (IADC_TypeDef *)DT_INST_REG_ADDR(n),\
/Zephyr-latest/subsys/net/lib/lwm2m/
Dlwm2m_util.c331 int64_t base = PRECISION64, sign = 1; in lwm2m_atof() local
364 while (*(++pos) && base > 1 && isdigit((unsigned char)*pos) != 0) { in lwm2m_atof()
366 base /= 10; in lwm2m_atof()
369 val2 *= sign * base; in lwm2m_atof()
373 return !*pos || base == 1 ? 0 : -EINVAL; in lwm2m_atof()
/Zephyr-latest/drivers/i3c/
Di3c_npcx.c183 struct i3c_reg *base; member
352 struct i3c_reg *inst = config->base; in npcx_i3c_enable_target_interrupt()
668 struct i3c_reg *inst = config->base; in npcx_i3c_recover_bus()
835 struct i3c_reg *i3c_inst = config->base; in npcx_i3c_xfer_write_fifo_dma()
893 struct i3c_reg *i3c_inst = config->base; in npcx_i3c_xfer_read_fifo_dma()
946 struct i3c_reg *inst = config->base; in npcx_i3c_do_one_xfer_dma()
1121 struct i3c_reg *inst = config->base; in npcx_i3c_transfer()
1313 struct i3c_reg *inst = config->base; in npcx_i3c_do_daa()
1494 struct i3c_reg *inst = config->base; in npcx_i3c_do_ccc()
1617 struct i3c_reg *inst = config->base; in npcx_i3c_ibi_work()
[all …]
/Zephyr-latest/drivers/dma/
Ddma_intel_adsp_hda_link_in.c29 .base = DT_INST_REG_ADDR(inst), \
Ddma_intel_adsp_hda_link_out.c29 .base = DT_INST_REG_ADDR(inst), \
/Zephyr-latest/boards/snps/nsim/arc_classic/support/
Dmdb_hs_smp.args48 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=0,use_connect=1
Dmdb_em7d_v22.args52 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_em7d_v22.props57 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_hs5x.props60 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dnsim_hs6x.props59 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
Dmdb_hs6x_smp.args63 -prop=nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
/Zephyr-latest/drivers/i2c/
Di2c_sifive.c22 #define I2C_REG(config, reg) ((mem_addr_t) ((config)->base + reg))
64 uint32_t base; member
331 .base = DT_INST_REG_ADDR(n), \
/Zephyr-latest/drivers/flash/
Dflash_npcx_fiu_qspi.c23 ((struct fiu_reg *)((const struct npcx_qspi_fiu_config *)(dev)->config)->base)
28 uintptr_t base; member
284 .base = DT_INST_REG_ADDR(n), \
/Zephyr-latest/drivers/watchdog/
Dwdt_npcx.c72 uintptr_t base; member
92 #define HAL_INSTANCE(dev) ((struct twd_reg *)((const struct wdt_npcx_config *)(dev)->config)->base)
373 .base = DT_INST_REG_ADDR(0),
/Zephyr-latest/boards/others/stm32f030_demo/doc/
Dindex.rst11 More information about the board can be found at the `stm32-base.org website`_.
109 .. _stm32-base.org website:
110 https://stm32-base.org/boards/STM32F030F4P6-STM32F030-DEMO-BOARD-V1.1
/Zephyr-latest/drivers/mbox/
Dmbox_nxp_s32_mru.c35 RTU_MRU_Type *base; member
54 return ((uintptr_t)cfg->base + (channel + 1) * MRU_CHANNEL_OFFSET in get_mbox_addr()
83 tx_cfg.ChMBSTATAdd = (volatile uint32 *)&cfg->base->CHXCONFIG[channel].CH_MBSTAT; in nxp_s32_mru_send()
278 .base = MRU_BASE(n), \
/Zephyr-latest/cmake/
Dgen_version_h.cmake5 set(ZEPHYR_BASE $ENV{ZEPHYR_BASE} CACHE PATH "Zephyr base")
/Zephyr-latest/arch/xtensa/core/
Dfatal.c143 if ((arch_current_thread()->base.user_options & K_USER) != 0) { in z_impl_xtensa_user_fault()
/Zephyr-latest/include/zephyr/arch/arm/mpu/
Dnxp_mpu.h219 uint32_t base; member
231 .base = _base, \
/Zephyr-latest/arch/arm/core/
Dvector_table.ld16 /* VTOR bits 0:7 are reserved (RES0). This requires that the base address
21 /* VTOR bits 0:6 are reserved (RES0). This requires that the base address
/Zephyr-latest/subsys/mgmt/hawkbit/
Dhawkbit.c128 struct hawkbit_ctl_res base; member
929 &hb_context->results.base); in response_cb()
1216 if (s->hb_context.results.base.config.polling.sleep) { in s_probe()
1218 LOG_DBG("config.polling.sleep=%s", s->hb_context.results.base.config.polling.sleep); in s_probe()
1219 hawkbit_update_sleep(&s->hb_context.results.base); in s_probe()
1222 if (s->hb_context.results.base._links.cancelAction.href) { in s_probe()
1224 s->hb_context.results.base._links.cancelAction.href); in s_probe()
1226 } else if (s->hb_context.results.base._links.configData.href) { in s_probe()
1228 s->hb_context.results.base._links.configData.href); in s_probe()
1230 } else if (s->hb_context.results.base._links.deploymentBase.href) { in s_probe()
[all …]
/Zephyr-latest/arch/x86/core/
Dx86_mmu.c579 static void print_entries(pentry_t entries_array[], uint8_t *base, int level, in print_entries() argument
589 (uintptr_t)base + (get_entry_scope(level) * i); in print_entries()
652 static void dump_ptables(pentry_t *table, uint8_t *base, int level) in dump_ptables() argument
658 if (((uintptr_t)base & BITL(47)) != 0) { in dump_ptables()
659 base = (uint8_t *)((uintptr_t)base | (0xFFFFULL << 48)); in dump_ptables()
668 printk("for %p - %p\n", base, in dump_ptables()
669 base + get_table_scope(level) - 1); in dump_ptables()
672 print_entries(table, base, level, info->entries); in dump_ptables()
691 dump_ptables(next, base + (j * get_entry_scope(level)), in dump_ptables()
1517 if ((incoming->base.user_options & K_USER) == 0) { in z_x86_swap_update_common_page_table()
[all …]

1...<<11121314151617181920>>...34