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/Zephyr-latest/soc/aspeed/ast10x0/
Dsoc.c90 uint32_t base = DT_REG_ADDR(DT_NODELABEL(syscon)); in soc_reset_hook() local
93 jtag_pinmux = sys_read32(base + JTAG_PINMUX_REG); in soc_reset_hook()
95 sys_write32(jtag_pinmux, base + JTAG_PINMUX_REG); in soc_reset_hook()
/Zephyr-latest/arch/xtensa/core/
Dthread.c75 if ((thread->base.user_options & K_USER) == K_USER) { in init_stack()
100 frame->bsa.threadptr = (uintptr_t)((thread->base.user_options & K_USER) ? thread : NULL); in init_stack()
180 if ((thread->base.user_options & K_USER) != K_USER) { in arch_thread_priv_stack_space_get()
/Zephyr-latest/subsys/net/pkt_filter/
DCMakeLists.txt6 zephyr_library_sources(base.c)
/Zephyr-latest/arch/arm/core/mpu/
Darm_mpu_v8_internal.h165 (region_conf->base & MPU_RBAR_BASE_Msk) in region_init()
176 index, region_conf->base, region_conf->attr.rbar, in region_init()
253 static inline void mpu_region_set_base(const uint32_t index, const uint32_t base) in mpu_region_set_base() argument
257 | (base & MPU_RBAR_BASE_Msk)); in mpu_region_set_base()
297 region_conf->base = mpu_get_rbar() & MPU_RBAR_BASE_Msk; in mpu_region_get_conf()
310 const k_mem_partition_attr_t *attr, uint32_t base, uint32_t size) in get_region_attr_from_mpu_partition_info() argument
315 p_attr->r_limit = REGION_LIMIT_ADDR(base, size); in get_region_attr_from_mpu_partition_info()
625 fill_region.base = regions[i].start + in mpu_configure_regions_and_partition()
/Zephyr-latest/subsys/shell/
Dshell_utils.c550 long shell_strtol(const char *str, int base, int *err) in shell_strtol() argument
556 val = strtol(str, &endptr, base); in shell_strtol()
568 unsigned long shell_strtoul(const char *str, int base, int *err) in shell_strtoul() argument
579 val = strtoul(str, &endptr, base); in shell_strtoul()
591 unsigned long long shell_strtoull(const char *str, int base, int *err) in shell_strtoull() argument
602 val = strtoull(str, &endptr, base); in shell_strtoull()
614 bool shell_strtobool(const char *str, int base, int *err) in shell_strtobool() argument
624 return shell_strtoul(str, base, err); in shell_strtobool()
/Zephyr-latest/drivers/adc/
Dadc_stm32.c179 ADC_TypeDef *base; member
214 ADC_TypeDef *adc = config->base; in adc_stm32_dma_start()
371 ADC_TypeDef *adc = config->base; in adc_stm32_start_conversion()
476 ADC_TypeDef *adc = config->base; in adc_stm32_calibration_start()
532 ADC_TypeDef *adc = config->base; in adc_stm32_calibrate()
688 ADC_TypeDef *adc = config->base; in adc_stm32_oversampling()
728 ADC_TypeDef *adc = config->base; in dma_callback()
777 ADC_TypeDef *adc = config->base; in get_reg_value()
788 ADC_TypeDef *adc = config->base; in set_reg_value()
799 ADC_TypeDef *adc = config->base; in set_resolution()
[all …]
Dadc_npcx.c47 uintptr_t base; member
131 #define HAL_INSTANCE(dev) ((struct adc_reg *)((const struct adc_npcx_config *)(dev)->config)->base)
172 THEN(config->base) |= BIT(th_sel); in adc_npcx_enable_threshold_detect()
174 THRCTL(config->base, th_sel) |= BIT(NPCX_THRCTL_THEN); in adc_npcx_enable_threshold_detect()
179 THEN(config->base) &= ~BIT(th_sel); in adc_npcx_enable_threshold_detect()
181 THRCTL(config->base, th_sel) &= ~BIT(NPCX_THRCTL_THEN); in adc_npcx_enable_threshold_detect()
208 result = GET_FIELD(CHNDAT(config->base, channel), in adc_npcx_isr()
596 SET_FIELD(THRCTL(config->base, th_sel), in adc_npcx_threshold_ctrl_setup()
600 THRCTL(config->base, th_sel) |= BIT(NPCX_THRCTL_L_H); in adc_npcx_threshold_ctrl_setup()
602 THRCTL(config->base, th_sel) &= ~BIT(NPCX_THRCTL_L_H); in adc_npcx_threshold_ctrl_setup()
[all …]
Dadc_gecko.c41 ADC_TypeDef *base; member
51 ADC_TypeDef *adc_base = (ADC_TypeDef *)config->base; in adc_gecko_set_config()
149 ADC_TypeDef *adc_base = (ADC_TypeDef *)config->base; in adc_gecko_start_channel()
180 ADC_TypeDef *adc_base = config->base; in adc_gecko_isr()
293 .base = (ADC_TypeDef *)DT_INST_REG_ADDR(n), \
/Zephyr-latest/tests/drivers/uart/uart_mix_fifo_poll/src/
Dmain.c83 int base = b >> 4; in process_byte() local
84 struct rx_source *src = &source[base]; in process_byte()
98 (base << 4) | b, (base << 4) | src->prev); in process_byte()
250 static void int_async_thread_func(void *p_data, void *base, void *range) in int_async_thread_func() argument
253 int wait_base = (int)base; in int_async_thread_func()
/Zephyr-latest/arch/arm/core/cortex_m/
Dthread.c78 if ((thread->base.user_options & K_FP_REGS) != 0) { in arch_new_thread()
92 if ((thread->base.user_options & K_USER) != 0) { in arch_new_thread()
120 if ((thread->base.user_options & K_FP_REGS) != 0) { in arch_new_thread()
192 if (((thread->base.user_options & K_FP_REGS) != 0) || in z_arm_mpu_stack_guard_and_fpu_adjust()
210 thread->base.user_options |= K_FP_REGS; in z_arm_mpu_stack_guard_and_fpu_adjust()
472 thread->base.user_options &= ~K_FP_REGS; in arch_float_disable()
Dvt_pointer_section.ld7 /* Reserved 4 bytes to save vector table base address */
Dexc_exit.c59 if (_kernel.cpus->current->base.prio >= 0) { in z_arm_exc_exit()
/Zephyr-latest/include/zephyr/drivers/dma/
Ddma_intel_lpss.h19 void dma_intel_lpss_set_base(const struct device *dev, uintptr_t base);
/Zephyr-latest/lib/os/
Dp4wq.c22 th->base.prio = item->priority; in set_prio()
23 th->base.prio_deadline = item->deadline; in set_prio()
44 th->base.user_options |= K_CALLBACK_STATE; in thread_set_requeued()
49 th->base.user_options &= ~K_CALLBACK_STATE; in thread_clear_requeued()
54 return !!(th->base.user_options & K_CALLBACK_STATE); in thread_was_requeued()
/Zephyr-latest/drivers/gnss/
Dgnss_parse.h63 int gnss_parse_atoi(const char *str, uint8_t base, int32_t *integer);
Dgnss_parse.c135 int gnss_parse_atoi(const char *str, uint8_t base, int32_t *integer) in gnss_parse_atoi() argument
142 *integer = (int32_t)strtol(str, &end, (int)base); in gnss_parse_atoi()
/Zephyr-latest/drivers/usb/udc/
Dudc_it82xx2.c138 struct usb_it82xx2_regs *const base; member
168 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_get_ext_ctrl()
187 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_usb_extend_ep_ctrl()
289 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_usb_ep_ctrl()
428 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_usb_fifo_ctrl()
494 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_ep_dequeue()
522 struct usb_it82xx2_regs *const usb_regs = config->base; in ctrl_ep_stall_workaround()
640 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_host_wakeup()
667 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_set_address()
679 struct usb_it82xx2_regs *const usb_regs = config->base; in it82xx2_usb_dc_ip_init()
[all …]
/Zephyr-latest/subsys/tracing/sysview/
Dsysview_config.c43 Info.Prio = thread->base.prio; in sys_trace_thread_info()
76 .Prio = thread->base.prio, in send_task_list_cb()
/Zephyr-latest/drivers/pwm/
Dpwm_ite_it8xxx2.c39 struct pwm_it8xxx2_regs *base; member
100 struct pwm_it8xxx2_regs *const inst = config->base; in pwm_it8xxx2_set_cycles()
234 struct pwm_it8xxx2_regs *const inst = config->base; in pwm_it8xxx2_init()
293 .base = (struct pwm_it8xxx2_regs *) DT_REG_ADDR(DT_NODELABEL(prs)), \
/Zephyr-latest/scripts/
Drequirements.txt1 -r requirements-base.txt
/Zephyr-latest/drivers/gpio/
Dgpio_xlnx_ps.h28 mem_addr_t base; member
/Zephyr-latest/drivers/counter/
Dcounter_ifx_cat1.c71 uintptr_t base = POINTER_TO_UINT(_CYHAL_TCPWM_DATA[i].base); in get_hw_block_info() local
72 uintptr_t cnt = POINTER_TO_UINT(_CYHAL_TCPWM_DATA[i].base->CNT); in get_hw_block_info()
74 uintptr_t end_addr = base + sizeof(TCPWM_Type); in get_hw_block_info()
76 if ((reg_addr_ptr > base) && (reg_addr_ptr < end_addr)) { in get_hw_block_info()
131 Cy_TCPWM_SetInterrupt(data->counter_obj.tcpwm.base, in ifx_cat1_counter_set_int_pending()
293 TCPWM_CNT_PERIOD(data->counter_obj.tcpwm.base, in ifx_cat1_counter_set_top_value()
431 TCPWM_CNT_CC(data->counter_obj.tcpwm.base, in ifx_cat1_counter_set_alarm()
/Zephyr-latest/tests/ztest/fail/core/
DCMakeLists.txt28 project(base) project
35 project(base) project
/Zephyr-latest/drivers/dma/
Ddma_stm32.c73 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_dump_stream_irq()
81 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_clear_stream_irq()
91 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_irq_handler()
151 DMA_TypeDef *dma_##index = (DMA_TypeDef *)(cfg_##index->base); \
278 DMA_TypeDef *dma = (DMA_TypeDef *)dev_config->base; in dma_stm32_configure()
519 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_reload()
568 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_start()
598 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_stop()
672 DMA_TypeDef *dma = (DMA_TypeDef *)(config->base); in dma_stm32_get_status()
705 .base = DT_INST_REG_ADDR(index), \
/Zephyr-latest/drivers/flash/
Dflash_sam0.c213 static int flash_sam0_commit(const struct device *dev, off_t base) in flash_sam0_commit() argument
219 err = flash_sam0_erase_row(dev, base); in flash_sam0_commit()
226 dev, base + page * FLASH_PAGE_SIZE, in flash_sam0_commit()
262 off_t base = offset - start; in flash_sam0_write() local
267 memcpy(ctx->buf, (void *)base, sizeof(ctx->buf)); in flash_sam0_write()
270 err = flash_sam0_commit(dev, base); in flash_sam0_write()

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