| /Zephyr-latest/boards/ezurio/mg100/doc/ |
| D | index.rst | 9 Bluetooth 5 modules or devices and sends it to the cloud via a global low power cellular
11 full Bluetooth 5 connectivity, and dual-mode LTE-M/NB-IoT capabilities. The MG100 has full regulato…
12 and network certifications and End Device carrier approvals.
17 Zephyr community and Ezurio’s `Canvas Software Suite`_ to accelerate your development.
18 covering all aspects of the product's capabilities and hardware interfaces. The MG100 also delivers
19 complete antenna flexibility with internal or external antenna options available, and the optional
26 and the following devices:
36 * RADIO (Bluetooth Low Energy and 802.15.4)
57 Connections and IOs
76 images and data. Refer to the `Macronix MX25R6435F datasheet`_ for further
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| /Zephyr-latest/boards/nordic/nrf9131ek/doc/ |
| D | index.rst | 10 for DECT NR+ and LTE-M/NB-IoT with GNSS.
12 Cortex-M33F CPU with ARMv8-M Security Extension and the following devices:
36 contain the processor's information and the datasheet.
84 Connections and IOs
94 Push buttons and Switches
104 with the System Protection Unit and is used to define secure and non-secure
105 memory maps. By default, all of the memory space (Flash, SRAM, and
110 Programming and Debugging
113 ``nrf9131ek/nrf9131`` supports the Armv8m Security Extension, and by default boots
119 Applications on the nRF9131 may contain a Secure and a Non-Secure firmware
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| /Zephyr-latest/boards/st/sensortile_box/doc/ |
| D | index.rst | 7 IoT and wearable sensor platforms to help you use and develop apps based on
8 remote motion and environmental sensor data.
10 battery, and communicates with a standard smartphone through its Bluetooth interface,
26 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
49 - 3-axis accelerometers (LIS2DW12 and LIS3DHH)
56 - FTSH107 connector for SWD debugging and UART Tx/Rx
61 The SensorTile.box provides motion, environmental, and audio
70 - Compass and inclinometer
75 Connections and IOs
88 (used to let the SensorTile.box enter DFU mode. See `Programming and Debugging`_
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| /Zephyr-latest/drivers/w1/ |
| D | Kconfig.zephyr_gpio | 13 The bus reset, and bit read and write operations are executed
14 via byte read and write operations on top of the Zephyr
24 operations for bus reset, and bit read and write operations.
|
| /Zephyr-latest/doc/services/llext/ |
| D | index.rst | 10 loaded, and linked with the main Zephyr binary. Extensions can be manipulated
11 and introspected to some degree, as well as unloaded when no longer needed.
25 available only on RISC-V, ARM, ARM64, ARC (experimental) and Xtensa cores.
26 Harvard architecture cores that separate code and data paths and have no
|
| /Zephyr-latest/samples/modules/compression/lz4/ |
| D | README.rst | 4 Compress and decompress data using the LZ4 module.
9 A simple sample that can be used with any :ref:`supported board <boards>` and
12 Building and Running
15 Add the lz4 module to your West manifest and pull it:
22 The sample can be built and executed on nrf52840dk/nrf52840 as follows:
|
| /Zephyr-latest/boards/sc/scobc_module1/doc/ |
| D | index.rst | 7 especially for 3U CubeSats. The board is based on Xilinx Artix-7 FPGA and
11 vacuum, and space radiation.
13 As the name suggests, the board form factor is a module and requires a base I/O
15 CubeSat designers the freedom to connect and expand the capability required for
47 selected clock signal is then used by the CMT in the FPGA, and drives the CPU at
54 with Xilinx UART Lite for basic TX and RX. This UART is configured as the
55 default console and is accessible through the CON1 pin 43 and 45 for Rx and Tx,
58 Programming and Debugging
64 Here is an example for building and flashing the \`hello\_world\`
67 Here is an example for building and flashing the :zephyr:code-sample:`hello_world` application
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| /Zephyr-latest/boards/wch/ch32v003f4p6_dev_board/doc/ |
| D | index.rst | 7 QingKe 32-bit RISC-V2A processor and the following devices:
13 The board is equipped with one LED, wired to PD1 and SWIO pins.
15 and the datasheet.
21 by an internal RC oscillator and runs at 24 MHz.
28 Connections and IOs
36 Programming and Debugging
39 Applications for the ``ch32v003f4p6_dev_board`` board target can be built and
40 flashed in the usual way (see :ref:`build_an_application` and :ref:`application_run`
54 SWIO pin is connected to PD1 and also to led on the board. By default, the function
63 up, build and flash applications as usual (see :ref:`build_an_application` and
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| /Zephyr-latest/samples/subsys/display/lvgl/ |
| D | README.rst | 5 Display a "Hello World" and react to user input using LVGL.
11 and a counter at the bottom which increments every second.
13 additional widgets may be displayed and additional interactions enabled:
25 can be used to navigate between widgets and edit their values. If the
30 be used for focus shifting and also entering characters inside editable
38 Display shield and a board which provides a configuration
41 - :ref:`adafruit_2_8_tft_touch_v2` and :ref:`nrf52840dk_nrf52840`
42 - :ref:`buydisplay_2_8_tft_touch_arduino` and :ref:`nrf52840dk_nrf52840`
43 - :ref:`ssd1306_128_shield` and :zephyr:board:`frdm_k64f`
44 - :ref:`seeed_xiao_round_display` and :zephyr:board:`xiao_ble`
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| /Zephyr-latest/boards/renesas/ek_ra4m1/doc/ |
| D | index.rst | 6 The MCU integrates multiple series of software- and pin-compatible Arm®-based 32-bit
8 and efficient platform-based product development.
24 - SEGGER J-Link® On-Board (OB) interface for debugging and programming of the RA4M1 MCU. A
25 10pin JTAG/SWD interface is also provided for connecting optional external debuggers and
29 - Pin headers for access to power and signals for the Main MCU
33 - Main MCU oscillator crystals, providing precision 12.000 MHz and 32,768 Hz external reference
40 - Copper jumpers on PCB bottom side for configuration and access to selected MCU signals
45 logic and interfaces on the board. External 5 V or 3.3 V may be also supplied through alternate
47 - A two-color board status LED indicating availability of regulated power and connection status of …
50 - A User Push-Button switch, User Capacitive Touch Button sensor, and an optional User Potentiomete…
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| /Zephyr-latest/boards/renesas/ek_ra4m3/doc/ |
| D | index.rst | 9 process, built on FreeRTOS—and is expandable to use other RTOSes and middleware.
11 proof security, large embedded RAM, and low active power consumption down to 119µA/MHz
25 - MCU and USB current measurement points for precision current consumption measurement
26 - Multiple clock sources - RA MCU oscillator and sub-clock oscillator crystals, providing precision
27 …24.000 MHz and 32,768 Hz reference clock. Additional low-precision clocks are available internal t…
30 **System Control and Ecosystem Access**
32 - USB Full Speed Host and Device (micro AB connector)
36 - External power supply (using surface mount clamp test points and power input vias)
40 - Debug in (ETM, SWD, and JTAG)
43 - User LEDs and buttons
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| /Zephyr-latest/samples/synchronization/ |
| D | README.rst | 11 Two threads (A and B) take turns printing a greeting message to the console,
12 and use sleep requests and semaphores to control the rate at which messages
14 and timing are operating correctly.
16 Building and Running
19 This project outputs to the console. It can be built and executed
|
| /Zephyr-latest/samples/boards/nordic/nrf_led_matrix/ |
| D | README.rst | 10 driver in action and to serve as a test ensuring that this driver is buildable
11 for both the :zephyr:board:`bbc_microbit_v2` and :zephyr:board:`bbc_microbit` boards.
16 The sample has been tested on the bbc_microbit_v2 and bbc_microbit boards,
17 but it could be ported to any board with an nRF SoC and the proper number
22 Building and Running
27 To build and flash the application:
|
| /Zephyr-latest/doc/kernel/services/data_passing/ |
| D | queues.rst | 7 threads and ISRs to add and remove data items of any size. The queue is similar
8 to a FIFO and serves as the underlying implementation for both :ref:`k_fifo
9 <fifos_v2>` and :ref:`k_lifo <lifos_v2>`. For more information on usage see
|
| /Zephyr-latest/samples/subsys/bindesc/read_bindesc/ |
| D | README.rst | 5 Define some binary descriptors and read them.
10 A simple sample of :ref:`binary descriptor <binary_descriptors>` definition and reading.
12 Building and Running
23 For more details see :ref:`binary_descriptors` and :ref:`west-bindesc`.
|
| /Zephyr-latest/doc/kernel/data_structures/ |
| D | slist.rst | 9 constant-time access to the first (head) and last (tail) elements of
10 the list, insertion before the head and after the tail of the list and
12 requires access to the "previous" pointer and thus can only be
18 before use. Its interior fields are opaque and should not be accessed
22 :c:func:`sys_slist_peek_head` and :c:func:`sys_slist_peek_tail`, which will
31 containing struct and the field name of the node. Internally, the
36 :c:func:`sys_slist_prepend` and :c:func:`sys_slist_append`. They may also
47 for a given node and remove it if present.
55 extra scratch variable for storage and allows the user to delete the
57 in a "container" variant (:c:macro:`SYS_SLIST_FOR_EACH_CONTAINER` and
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|
| /Zephyr-latest/ |
| D | LICENSE | 9 "License" shall mean the terms and conditions for use, reproduction,
10 and distribution as defined by Sections 1 through 9 of this document.
15 "Legal Entity" shall mean the union of the acting entity and all
28 source, and configuration files.
33 and conversions to other media types.
41 form, that is based on (or derived from) the Work and for which the
46 the Work and Derivative Works thereof.
49 the original version of the Work and any modifications or additions
57 and issue tracking systems that are managed by, or on behalf of, the
58 Licensor for the purpose of discussing and improving the Work, but
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|
| /Zephyr-latest/boards/mikroe/clicker_ra4m1/doc/ |
| D | index.rst | 8 memory and 32 KB of SRAM.
14 buttons, and a reset button. It has J-Link onboard and mikroBUS socket for
23 Programming and debugging
29 You can build and flash an application in the usual way (See
30 :ref:`build_an_application` and
33 Here is an example for building and flashing the :zephyr:code-sample:`blinky` application.
|
| /Zephyr-latest/doc/templates/ |
| D | sample.tmpl | 10 [A longer description about the sample and what it does]
14 [List of required software and hardware components. Provide pointers to
15 hardware components such as sensors and shields]
23 Building and Running
25 [ How to build the sample and how to run it. Pointers to where to find the
26 sample in the source tree and how to configure it and run it for a specific
|
| /Zephyr-latest/doc/hardware/peripherals/can/ |
| D | transceiver.rst | 15 CAN High (CAN H) and CAN Low (CAN L).
17 and the receive wire is called CAN RX.
19 differentially between CAN H and CAN L.
21 state. The recessive state is when both lines, CAN H and CAN L, are roughly at
24 and CAN L to ground.
25 The first and last node use a 120-ohm resistor between CAN H and CAN L to
|
| /Zephyr-latest/boards/renesas/ek_ra2l1/doc/ |
| D | index.rst | 12 with- and without- ECC support)
33 - Native pin access through 1 x 40-pin and 3 x 20-pin male headers
36 Additionally, MCU oscillator and sub-clock oscillator crystals,
37 20.000 MHz and 32,768 Hz, are provided for precision
38 - SEGGER J-Link on-board programmer and debugger
39 - Two Digilent Pmod (SPI and UART)
51 Programming and debugging
57 You can build and flash an application with onboard J-Link debug adapter.
58 :ref:`build_an_application` and
61 Here is an example for building and flashing the :zephyr:code-sample:`blinky` application.
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|
| /Zephyr-latest/boards/element14/warp7/doc/ |
| D | index.rst | 7 core and Single Cortex M4 core.
14 The WaRP7 Platform is composed of a CPU and IO board.
23 - Audio Codec: NXP SGTL5000 (I2C4 and SAI1 interfaces)
30 - Debug USB exposing two UARTs (UART1 for A7 and UART2 for M4)
33 - Audio Jack: Mic and Stereo Headphone
38 - CPU i.MX7 Solo with a Single Cortex A7 (800MHz) core and
43 - RAM -> M4: 3x32KB (TCML, TCMU, OCRAM_S), 1x128KB (OCRAM) and 1x256MB (DDR)
52 - Murata Type 1DX Wi-Fi IEEE 802.11b/g/n and Bluetooth 4.1 plus EDR
58 For more information about the i.MX7 SoC and WaRP7, see these references:
73 Connections and IOs
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|
| /Zephyr-latest/boards/st/stm32wb5mmg/doc/ |
| D | stm32wb5mmg.rst | 6 STM32WB5MMG is an ultra-low-power and small form factor certified 2.4 GHz
8 OpenThread, dynamic, and static concurrent modes, and 802.15.4 proprietary
17 Dynamic and static concurrent modes
24 - Dedicated Arm|reg| Cortex|reg|-M0+ CPU for radio and security tasks
25 - Dedicated Arm|reg| Cortex|reg|-M4 CPU with FPU and ART (adaptive real-time accelerator) up to 64 …
27 - Fully integrated BOM, including 32 MHz radio and 32 kHz RTC crystals
38 STM32WB5MMG is an ultra-low-power and small form factor certified 2.4 GHz
40 dynamic, and static concurrent modes, and 802.15.4proprietary protocols. Based
43 and output power signal. Its low-power features enable extended battery life,
44 small coin-cell batteries, and energy harvesting. STM32WB5MMG revision Y is
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|
| /Zephyr-latest/doc/services/tfm/ |
| D | build.rst | 7 background, and linked with the Zephyr non-secure application. No knowledge
8 of TF-M's build system is required in most cases, and the following will
9 build a TF-M and Zephyr image pair, and run it in qemu with no additional
16 The outputs and certain key steps in this build process are described here,
17 however, since you will need to understand and interact with the outputs, and
18 deal with signing the secure and non-secure images before deploying them.
29 For each of these, it creates .bin, .hex, .elf, and .axf files.
31 The TF-M build system also creates signed variants of tfm_s and tfm_ns, and a
43 The Zephyr build system usually signs both tfm_s and the Zephyr non-secure app itself.
60 (BL2) and firmware images must be signed with a private key. The firmware image
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| /Zephyr-latest/boards/nxp/frdm_kl25z/doc/ |
| D | index.rst | 7 Kinetis |reg| L Series KL1x (KL14/15) and KL2x (KL24/25) MCUs built
12 options and a built-in debug interface for flash programming and run-control.
18 - On board capacitive touch "slider", MMA8451Q accelerometer, and tri-color LED
21 For more information about the KL25Z SoC and FRDM-KL25Z board:
63 Connections and IOs
66 The KL25Z SoC has five pairs of pinmux/gpio controllers, and all are currently enabled
67 (PORTA/GPIOA, PORTB/GPIOB, PORTC/GPIOC, PORTD/GPIOD, and PORTE/GPIOE) for the FRDM-KL25Z board.
105 device and host functions through its mini USB connector (USB KL25Z).
108 Programming and Debugging
111 Build and flash applications as usual (see :ref:`build_an_application` and
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