Searched full:tram (Results 1 – 19 of 19) sorted by relevance
19 * \brief Driver for Arm TRAM.33 * \brief ARM TRAM device configuration structure36 const uint32_t base; /*!< TRAM base address */40 * \brief ARM TRAM device structure43 const struct tram_dev_cfg_t *const cfg; /*!< TRAM configuration */
19 * \brief Driver for Arm TRAM.32 /*!< Offset: 0x000 (R/ ) TRAM Build Configuration Register */34 /*!< Offset: 0x004 (R/W) TRAM Configuration Register */36 /*!< Offset: 0x008 ( /W) TRAM Key Register */
59 /**< Offset: 0x0B4 (R/W) TRAM Single Corrected ECC Error Captured Address register */61 /**< Offset: 0x0B8 (R/W) TRAM Double Uncorrected ECC Error Captured Address register */
35 tram:106 description: "Release DCU lock, enable and zeroize TRAM, and release CPUWAIT"
133 invalid_irq_handler, /* 37: SRAM or TRAM Corrected ECC Error (Secure) Handler */216 TRAM_BASE_S + 0x8, /* TRAM key register */ in setup_tram_encryption()251 * we need to generate a new TRAM key. in setup_tram_encryption()302 /* Now switch back to the right stack (which is in the TRAM) */ in Reset_Handler()
128 invalid_irq_handler, /* 37: SRAM or TRAM Corrected ECC Error (Secure) Handler */
185 SRAM_TRAM_ECC_Err_S_Handler, /* 37: SRAM or TRAM Corrected ECC Error (Secure) Handler */
43 /* Arm TRAM driver structures */
8 # This command reads 8 words from VM0 into the TRAM key registers
8 # This command reads 8 words from the OTP TRNG to VM0, overwriting the TRAM
8 # This command reads 8 words from the OTP TRNG to VM0, overwriting the TRAM key
8 # This command writes the TRAM enable register.
21 set(RSE_ENABLE_TRAM @RSE_ENABLE_TRAM@ CACHE BOOL "Whether TRAM encryption i…
68 /* ARM TRAM */
25 - Uses TRAM for BL1_1 data sections.
66 /* SRAM or TRAM Corrected ECC Error (Secure) Interrupt */
52 /* TRAM driver structures */
137 set(RSE_ENABLE_TRAM OFF CACHE BOOL "Whether TRAM encryption is enabled")
112 #define TRAM_BASE_S 0x5015D000 /* TRAM Secure base address */
