Searched full:slices (Results 1 – 9 of 9) sorted by relevance
/Zephyr-latest/soc/xlnx/zynq7000/xc7zxxx/ |
D | Kconfig.soc | 21 28k logic cells, 2.1Mb block RAM, 800 DSP slices, up to 100 I/O pins. 28 74k logic cells, 3.3Mb block RAM, 160 DSP slices, up to 150 I/O pins, 36 85k logic cells, 4.9Mb block RAM, 220 DSP slices, up to 200 I/O pins. 43 125k logic cells, 9.3Mb block RAM, 400 DSP slices, up to 250 I/O pins, 51 275k logic cells, 17.6Mb block RAM, 900 DSP slices, up to 362 I/O pins, 59 350k logic cells, 19.1Mb block RAM, 900 DSP slices, up to 362 I/O pins, 67 444k logic cells, 26.5Mb block RAM, 2020 DSP slices, up to 400 I/O pins,
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/Zephyr-latest/soc/xlnx/zynq7000/xc7zxxxs/ |
D | Kconfig.soc | 21 23k logic cells, 1.8 Mb block RAM, 60 DSP slices, up to 100 I/O pins. 28 55k logic cells, 2.5Mb block RAM, 120 DSP slices, up to 150 I/O pins, 36 65k logic cells, 3.8Mb block RAM, 170 DSP slices, up to 200 I/O pins.
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/Zephyr-latest/drivers/flash/ |
D | Kconfig.nrf | 53 slices instead of blocking MCU, for the time it is needed to
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/Zephyr-latest/dts/bindings/pwm/ |
D | infineon,xmc4xxx-ccu4-pwm.yaml | 9 Each module has four slices and each slice has one channel.
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D | raspberrypi,pico-pwm.yaml | 94 # The rpi pico pwm peripheral is divided in 8 slices with an individual
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D | infineon,xmc4xxx-ccu8-pwm.yaml | 19 pwm_ccu81. Each module has four slices, and each slice has
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/Zephyr-latest/doc/kernel/services/scheduling/ |
D | index.rst | 172 The scheduler divides time into a series of **time slices**, where slices
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/Zephyr-latest/subsys/bluetooth/mesh/ |
D | proxy_srv.c | 825 * 6 slices, but make sure that a slice is more than one in gatt_proxy_advertise()
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/Zephyr-latest/doc/releases/ |
D | release-notes-2.0.rst | 1229 * :github:`15588` - Does zephyr support different time slices for each thread?
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