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/Zephyr-latest/samples/boards/st/uart/single_wire/
DREADME.rst1 .. zephyr:code-sample:: uart-stm32-single-wire
2 :name: Single-wire UART
3 :relevant-api: uart_interface
5 Use single-wire/half-duplex UART functionality of STM32 devices.
10 A simple application demonstrating how to use the single wire / half-duplex UART
23 .. zephyr-app-commands::
24 :zephyr-app: samples/boards/st/uart/single_wire
32 .. code-block:: none
Dsample.yaml2 name: STM32 Single Wire UART sample
7 - drivers
8 - uart
14 - "Received c"
/Zephyr-latest/dts/bindings/w1/
Dzephyr,w1-serial.yaml2 # SPDX-License-Identifier: Apache-2.0
4 # Properties for the serial 1-Wire master driver:
7 # the option for a "single-wire Half-duplex" mode, where the TX and RX lines
8 # are internally connected, such that only a single IO
9 # needs to be allocated for the 1-Wire communication.
11 description: 1-Wire master over Zephyr uart
13 compatible: "zephyr,w1-serial"
15 include: [uart-device.yaml, w1-master.yaml]
Dmaxim,ds2477_85_common.yaml2 # SPDX-License-Identifier: Apache-2.0
4 # Common Properties for the DS2477 and DS2485 I2C 1-Wire masters:
6 include: [w1-master.yaml, i2c-device.yaml]
9 switching-threshold:
13 - "low"
14 - "medium"
15 - "high"
16 - "off"
18 Default Low-to-High Switching Threshold.
26 active-pull-threshold:
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Dmaxim,ds2484.yaml2 # SPDX-License-Identifier: Apache-2.0
4 description: DS4284 Single-Channel 1-Wire Master
8 include: [i2c-device.yaml, w1-master.yaml]
11 slpz-gpios:
12 type: phandle-array
/Zephyr-latest/samples/boards/st/uart/single_wire/boards/
Dstm32f3_disco.overlay4 * SPDX-License-Identifier: Apache-2.0
9 single-line-uart1 = &usart2;
10 single-line-uart2 = &uart4;
15 pinctrl-0 = <&usart2_tx_pa2>;
16 single-wire;
20 pinctrl-0 = <&uart4_tx_pc10>;
21 single-wire;
/Zephyr-latest/doc/hardware/peripherals/
Dw1.rst3 1-Wire Bus
9 1-Wire is a low speed half-duplex serial bus using only a single wire plus
11 Similarly to I2C, 1-Wire uses a bidirectional open-collector data line,
12 and is a single master multidrop bus. This means one master initiates all data
14 The 1-Wire bus supports longer bus lines than I2C, while it reaches speeds of up
23 .. figure:: 1-Wire_bus_topology.drawio.svg
25 :alt: 1-Wire bus topology
27 A typical 1-Wire bus topology
30 .. _w1-master-api:
35 Zephyr's 1-Wire Master API is used to interact with 1-Wire slave devices like
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Despi.rst10 based on SPI. It also features a four-wire interface (receive, transmit, clock
11 and target select) and three configurations: single IO, dual IO and quad IO.
27 https://downloadmirror.intel.com/27055/327432%20espi_base_specification%20R1-5.pdf
/Zephyr-latest/drivers/w1/
DKconfig1 # 1-Wire configuration options
4 # SPDX-License-Identifier: Apache-2.0
8 prompt "1-Wire bus drivers"
11 Enable 1-Wire Drivers
16 module-str = W1
24 1-Wire device driver initialization priority.
27 bool "1-Wire Shell"
30 Enable 1-Wire Shell for testing.
36 prompt "1-Wire Shell buffer size"
42 rsource "Kconfig.ds2482-800"
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DKconfig.ds24842 # SPDX-License-Identifier: Apache-2.0
5 bool "DS2484 Single-Channel 1-Wire Master"
/Zephyr-latest/include/zephyr/drivers/
Dw1.h5 * SPDX-License-Identifier: Apache-2.0
10 * @brief Public 1-Wire Driver APIs
27 * @brief 1-Wire Interface
28 * @defgroup w1_interface 1-Wire Interface
40 * only a single slave is present.
46 (FOR_EACH(F1, (+), DT_SUPPORTS_DEP_ORDS(node_id)) - 1)
53 * @brief Defines the 1-Wire master settings types, which are runtime configurable.
74 /** Configuration common to all 1-Wire master implementations. */
80 /** Data common to all 1-Wire master implementations. */
118 struct w1_master_data *ctrl_data = (struct w1_master_data *)dev->data; in z_impl_w1_change_bus_lock()
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/Zephyr-latest/dts/bindings/serial/
Dnxp,lpuart.yaml5 include: [uart-controller.yaml, uart-controller-pin-inversion.yaml, pinctrl-device.yaml]
18 single-wire:
21 Enable the single wire half-duplex communication.
26 nxp,rs485-mode:
30 of an external RS-485 transceiver. Note hw-flow-control should be
33 nxp,rs485-de-active-low:
Dst,stm32-uart-base.yaml2 # SPDX-License-Identifier: Apache-2.0
5 description: STM32 UART-BASE
8 - name: uart-controller.yaml
9 property-blocklist:
10 - clock-frequency
11 - name: pinctrl-device.yaml
12 - name: reset-device.yaml
13 - name: uart-controller-pin-inversion.yaml
28 single-wire:
31 Enable the single wire half-duplex communication.
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/Zephyr-latest/subsys/bluetooth/controller/coex/
Dreadme.rst2 Bluetooth co-existence drivers
5 Co-existence Ticker
8 …cker.c` is designed to utilize co-existence with another transmitter. Chips such as nordic nRF9160…
10 Nordic connect SDK provides detailed description of the 1-wire and 3-wire co-existence interface fo…
12 …ilarly, as in the nordic implementation of the 1-wire interface, the coexistence ticker utilizes a…
14 .. code-block:: DTS
17 compatible = "gpio-radio-coex";
18 grant-gpios = <&gpio0 0 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>;
19 grant-delay-us = <150>;
22 Whenever the grant pin transitions into non-active (such as 1 for the nRF9160). state the implement…
/Zephyr-latest/dts/bindings/debug/
Darm,armv7m-itm.yaml2 # SPDX-License-Identifier: Apache-2.0
5 ARMv7 instrumentation trace macrocell. Used for single wire output (SWO)
7 compatible: "arm,armv7m-itm"
Darm,armv8m-itm.yaml2 # SPDX-License-Identifier: Apache-2.0
5 ARMv8 instrumentation trace macrocell. Used for single wire output (SWO)
7 compatible: "arm,armv8m-itm"
/Zephyr-latest/samples/sensor/ds18b20/boards/
Dnucleo_g0b1re.overlay4 * SPDX-License-Identifier: Apache-2.0
12 * b) the UART TX pin only, while the single wire half-duplex mode is enabled.
13 * An external pull-up should be added anyways.
19 drive-open-drain;
20 bias-pull-up;
/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/radio/
Dradio_nrf5_ppi_resources.h2 * Copyright (c) 2021-2024 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
9 /* PPI channel 20 is pre-programmed with the following fixed settings:
10 * EEP: TIMER0->EVENTS_COMPARE[0]
11 * TEP: RADIO->TASKS_TXEN
14 /* PPI channel 21 is pre-programmed with the following fixed settings:
15 * EEP: TIMER0->EVENTS_COMPARE[0]
16 * TEP: RADIO->TASKS_RXEN
20 /* PPI channel 26 is pre-programmed with the following fixed settings:
21 * EEP: RADIO->EVENTS_ADDRESS
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Dradio_nrf5_dppi_resources.h2 * Copyright (c) 2021-2024 Nordic Semiconductor ASA
4 * SPDX-License-Identifier: Apache-2.0
9 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
16 * wire the RADIO EVENTS_ADDRESS event to the
23 * wire the EVENT_TIMER EVENTS_COMPARE[<HCTO timer>] event
30 * wire the RADIO EVENTS_END event to the
37 * wire the RTC0 EVENTS_COMPARE[2] event to EVENT_TIMER TASKS_START task.
47 * wire the RADIO EVENTS_READY event to the
54 * wire the RADIO EVENTS_ADDRESS event to the CCM TASKS_CRYPT task.
63 * wire the RADIO EVENTS_BCMATCH event to the AAR TASKS_START task.
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Dradio_nrf5_ppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
10 * SW_SWITCH_TIMER-based auto-switch for TIFS, when receiving in LE Coded PHY.
16 /* Wire the SW SWITCH TIMER EVENTS_COMPARE[<cc_offset>] event
38 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
40 * Use the pre-programmed PPI channels if possible (if TIMER0 is used as the
47 /* No need to configure anything for the pre-programmed channels. in hal_radio_enable_on_tick_ppi_config_and_enable()
66 (uint32_t)&(EVENT_TIMER->EVENTS_COMPARE[0]), in hal_radio_enable_on_tick_ppi_config_and_enable()
67 (uint32_t)&(NRF_RADIO->TASKS_TXEN)); in hal_radio_enable_on_tick_ppi_config_and_enable()
70 NRF_PPI->CHG[SW_SWITCH_SINGLE_TIMER_TASK_GROUP_IDX] = in hal_radio_enable_on_tick_ppi_config_and_enable()
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Dradio_nrf5_dppi.h2 * Copyright (c) 2018 - 2020 Nordic Semiconductor ASA
5 * SPDX-License-Identifier: Apache-2.0
24 * wire the EVENT_TIMER EVENTS_COMPARE[0] event to RADIO TASKS_TXEN/RXEN task.
61 * wire the RADIO EVENTS_ADDRESS event to the
74 * wire the EVENT_TIMER EVENTS_COMPARE[<HCTO timer>] event
87 * wire the RADIO EVENTS_END event to the
99 * wire the RTC0 EVENTS_COMPARE[2] event to EVENT_TIMER TASKS_START task.
129 * wire the RADIO EVENTS_READY event to the
143 * wire the RADIO EVENTS_ADDRESS event to the CCM TASKS_CRYPT task.
165 * wire the RADIO EVENTS_BCMATCH event to the AAR TASKS_START task.
[all …]
/Zephyr-latest/dts/bindings/spi/
Draspberrypi,pico-spi-pio.yaml2 # SPDX-License-Identifier: Apache-2.0
6 compatible: "raspberrypi,pico-spi-pio"
8 include: ["spi-controller.yaml", "raspberrypi,pico-pio-device.yaml", "reset-device.yaml"]
11 clk-gpios:
12 type: phandle-array
17 mosi-gpios:
18 type: phandle-array
22 miso-gpios:
23 type: phandle-array
27 sio-gpios:
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/Zephyr-latest/drivers/bluetooth/hci/
DKconfig4 # SPDX-License-Identifier: Apache-2.0
29 Bluetooth three-wire (H:5) UART driver. Implementation of HCI
30 Three-Wire UART Transport Layer.
48 HCI packets are sent and received as single Byte transfers,
77 bool "ACI message with BlueNRG-based devices"
82 Stack. Current driver supports: ST BLUENRG-MS.
168 Single CPU mode.
213 HCI packets are sent and received as single Byte transfers.
238 Infineon's AIROC™ Wi-Fi & combos portfolio integrates
239 IEEE 802.11a/b/g/n/ac/ax Wi-Fi and Bluetooth® 5.2 in a single-chip
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/Zephyr-latest/dts/bindings/input/
Dfutaba,sbus.yaml2 # SPDX-License-Identifier: Apache-2.0
8 SBUS is an single-wire inverted serial protocol so either you need to use
9 the rx-invert feature of your serial driver or use an external signal inverter.
49 include: [base.yaml, uart-device.yaml]
51 child-binding:
53 SBUS Channel to input-event-code binding
62 Valid range: 1 - 16
/Zephyr-latest/doc/connectivity/bluetooth/
Dbluetooth-arch.rst1 .. _bluetooth-arch:
13 Zephyr supports mainly Bluetooth Low Energy (BLE), the low-power
18 .. _bluetooth-layers:
27 multiple (non real-time) network and transport protocols enabling
31 low-level, real-time protocol which provides, in conjunction with the Radio
32 Hardware, standard-interoperable over-the-air communication. The LL schedules
39 .. _bluetooth-hci:
54 .. _bluetooth-configs:
63 * **Single-chip configuration**: In this configuration, a single microcontroller
65 system-on-chip (SoC) implementation. In this case the BLE Host and the BLE
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